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AN4325 Datasheet(PDF) 20 Page - STMicroelectronics |
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AN4325 Datasheet(HTML) 20 Page - STMicroelectronics |
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20 / 27 page ![]() Recommendations AN4325 20/27 DocID024966 Rev 1 5 Recommendations 5.1 Printed circuit board For technical reasons, it is best to use a multilayer printed circuit board (PCB) with a separate layer dedicated to ground (VSS) and another dedicated to the VDD supply. This provides good decoupling and a good shielding effect. For many applications, economical reasons prohibit the use of this type of board. In this case, the major requirement is to ensure a good structure for ground and for the power supply. 5.2 Component position A preliminary layout of the PCB must make separate circuits: High-current circuits Low-voltage circuits Digital component circuits Circuits separated according to their EMI contribution. This will reduce cross-coupling on the PCB that introduces noise. 5.3 Ground and power supply (VDD, VDDA) Every block (noisy, low-level sensitive, digital, etc.) should be grounded individually and all ground returns should be to a single point. Loops must be avoided or have a minimum area. In order to improve analog performance, you must use separate supply sources for VDD and VDDA, and place the decoupling capacitors as close as possible to the device. The power supplies should be implemented close to the ground line to minimize the area of the supplies loop. This is due to the fact that the supply loop acts as an antenna, and is therefore the main transmitter and receiver of EMI. All component-free PCB areas must be filled with additional grounding to create a kind of shielding (especially when using single- layer PCBs). 5.4 Decoupling All power supply and ground pins must be properly connected to the power supplies. These connections, including pads, tracks and vias should have as low an impedance as possible. This is typically achieved with thick track widths and, preferably, the use of dedicated power supply planes in multilayer PCBs. In addition, each power supply pair should be decoupled with 100 nF filtering ceramic capacitor and a chemical capacitor of about 4.7 μF connected between the supply pins of the STM32F030 device. These capacitors need to be placed as close as possible to, or below, the appropriate pins on the underside of the PCB. Typical values are 10 nF to 100 nF, but exact values depend on the application needs. Figure 8 shows the typical layout of such a VDD/VSS pair. |
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