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UPD72001C Datasheet(PDF) 11 Page - NEC

Part # UPD72001C
Description  MULTI-PROTOCOL SERIAL CONTROLLERS
PDF  40 Pages
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Manufacturer  NEC [NEC]
Direct Link  http://www.nec.com/
Logo NEC - NEC

UPD72001C Datasheet(HTML) 11 Page - NEC

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µPD72001-11, 72001-A8
11
(a) When CR2A: D1, D0 = “0, 0” or “0, 1”
This pin functions as the DTRB output pin. The function of this pin is the same as the DTRA pin, except this
pin is used with channel B.
(b) When CR2A: D1, D0 = “1, 0”
This pin functions as the DRQRXB output pin. The function of this pin is the same as the DRQRxA pin, except
this pin is used with channel B.
(18) CTSA (Clear to Send A) and CTSB (Clear to Send B) ... Input
This pin is a general-purpose input pin and can be used to control a modem, etc. Changes in the status of this
pin affect the latching operation of the E/S bit. When E/S INT is enabled (CR1: D0 = “1”), the E/S interrupt is
generated.
If the Auto Enable mode (CR3: D5 = “1”) is set, the transmitter can be controlled by using the TX Enable bit (CR5:
D3) and this pin. This is illustrated in Table 1-3.
Table 1-3. Auto Enable Mode and CTS Pin
CTS Pin
TX Enable Bit
Transmitter Status
L
1
Enabled
H
1
Disabled
H or L
0
Disabled
(19) DCDA (Data Carrier Detect A) ... Input
DCDB (Data Carrier Detect B) ... Input
These are general-purpose input pins and can be used to control a modem, etc. Changes in the status of this
pin affect the latching operation of the E/S bit. When E/S INT is enabled (CR1: D0 = “1”), the E/S interrupt is
generated.
If the Auto Enable mode (CR3: D5 = “1”) is set, the receiver can be controlled by using the RX Enable bit (CR3:
D0) and this pin. This is illustrated in Table 1-4.
Table 1-4. Auto Enable Mode and DCD Pin
DCD Pin
RX Enable Bit
Receiver Status
L
1
Enabled
H
1
Disabled
H or L
0
Disabled
(20) RTSA (Request to Send A) ... Output
RTSB (Request to Send B) ... Output
These are general-purpose output pins and can be used to control a modem, etc. The operations of these pins
differ depending on the setting of the operation protocol and the setting of the Auto Enable bit, as shown in Table
1-5.



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