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UPD72001C Datasheet(PDF) 16 Page - NEC |
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UPD72001C Datasheet(HTML) 16 Page - NEC |
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16 / 40 page ![]() µPD72001-11, 72001-A8 16 Capacitance (TA = 25 °C, VDD = 0 V) Parameter Symbol Condition MIN. MAX. Unit Input capacitance CIN fC = 1 MHz 10 pF I/O capacitance CIO Pins other than test pin: 0 V 20 pF AC Characteristics µPD72001-11 (TA = –40 to +85 °C, VDD = 5 V ± 10 %) System interface: Parameter Symbol Condition Rated Value Unit MIN. MAX. Clock cycle tCYK 90 2 000 ns Clock high-pulse width tWKH 40 1 000 ns Clock low-pulse width tWKL 40 1 000 ns Clock rise time tKR 1.5 V → 3.0 V 10 ns Clock fall time tKF 3.0 V → 1.5 V 10 ns Address setup time (vs. RD ↓)tSAR 0ns Address hold time (vs. RD ↑)tHRA 0ns RD pulse width tWRL 120 ns Address → data output delay time tDAD TA = –10 to +70 °C 100 ns TA = –40 to +85 °C 110 RD → data output delay time tDRD TA = –10 to +70 °C 100 ns TA = –40 to +85 °C 110 RD → data float delay time tFRD 10 85 ns Address setup time (vs. WR ↓)tSAW 0ns Address hold time (vs. WR ↑)tHWA 0ns WR pulse width tWWL 120 ns Data setup time (vs. WR ↑)tSDW TA = –10 to +70 °C 100 ns TA = –40 to +85 °C90 Data hold time (vs. WR ↑)tHWA 0ns Recovery time between RD and WR tRV 140 ns |
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