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AM3874 Datasheet(PDF) 69 Page - Texas Instruments |
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AM3874 Datasheet(HTML) 69 Page - Texas Instruments |
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69 / 361 page  AM3874, AM3871 www.ti.com SPRS695C – SEPTEMBER 2011 – REVISED DECEMBER 2013 Table 3-11. GP1 Terminal Functions (continued) SIGNAL OTHER(2) TYPE(1) MUXED DESCRIPTION (3) NAME NO. SD2_DAT[1]_SDIRQ SD2, GPMC IPU / PINCNTL119 M24 I/O DVDD_GP GPMC_A[3]/ DSIS: PIN MC GP1[13] MM: MUX1 General-Purpose Input/Output (I/O) 1 [GP1] pin 13 GPMC, TIMER2 GPMC_A[18]/ IPD PINCNTL107 TIM2_IO/ AE28 I/O DVDD_GP DSIS: PIN GP1[13] MC MM: MUX0 VIN[0]A VIN[0]A_D[1]/ IPD PINCNTL141 AB11 I/O GP1[12] DVDD DSIS: PIN MM: MUX1 General-Purpose Input/Output (I/O) 1 [GP1] pin 12 MDIO IPU MDIO/ PINCNTL234 P24 I/O DVDD_GP GP1[12] DSIS: PIN MC MM: MUX0 VIN[0]A VIN[0]A_D[0]/ IPD PINCNTL140 AF9 I/O GP1[11] DVDD DSIS: PIN MM: MUX1 General-Purpose Input/Output (I/O) 1 [GP1] pin 11 MDIO IPU MDCLK/ PINCNTL233 H28 I/O DVDD_GP GP1[11] DSIS: PIN MC MM: MUX0 General-Purpose Input/Output (I/O) 1 [GP1] pin 10 The ENLVCMOS bit in the MLBP_DAT_IO_CTRL register should be set to 1 to enable GPIO LVCMOS mode. The PINCNTL65 ENN bit in the MLBP_DAT_IO_CTRL register should also IPU GP1[10] V2 I/O DSIS: PIN be set to 1 to enable the GPIO LVCMOS receiver. The DVDD_M MM: MUX1 internal Pullup/Pulldown is always disabled, regardless of the state of the PULLUDEN bit in the PINCNTL65 register. An external Pullup/Pulldown can be used to control the floating state of this pin. EMAC, TIMER2 EMAC_RMREFCLK/ IPD PINCNTL232 TIM2_IO/ J27 I/O DVDD_GP General-Purpose Input/Output (I/O) 1 [GP1] pin 10 DSIS: PIN GP1[10] MC MM: MUX0 General-Purpose Input/Output (I/O) 1 [GP1] pin 9 The ENLVCMOS bit in the MLBP_DAT_IO_CTRL register should be set to 1 to enable GPIO LVCMOS mode. The PINCNTL64 ENP bit in the MLBP_DAT_IO_CTRL register should also IPD GP1[9] V1 I/O DSIS: PIN be set to 1 to enable the GPIO LVCMOS receiver. The DVDD_M MM: MUX1 internal Pullup/Pulldown is always disabled, regardless of the state of the PULLUDEN bit in the PINCNTL64 register. An external Pullup/Pulldown can be used to control the floating state of this pin. VIN[0]B, CLKOUT0 VIN[0]B_CLK/ IPD PINCNTL134 CLKOUT0/ AE17 I/O General-Purpose Input/Output (I/O) 1 [GP1] pin 9 DVDD DSIS: PIN GP1[9] MM: MUX0 General-Purpose Input/Output (I/O) 1 [GP1] pin 8 The ENLVCMOS bit in the MLBP_DAT_IO_CTRL register should be set to 1 to enable GPIO LVCMOS mode. The PINCNTL63 ENN bit in the MLBP_DAT_IO_CTRL register should also IPU GP1[8] W2 I/O DSIS: PIN be set to 1 to enable the GPIO LVCMOS receiver. The DVDD_M MM: MUX1 internal Pullup/Pulldown is always disabled, regardless of the state of the PULLUDEN bit in the PINCNTL63 register. An external Pullup/Pulldown can be used to control the floating state of this pin. Copyright © 2011–2013, Texas Instruments Incorporated Device Pins 69 Submit Documentation Feedback Product Folder Links: AM3874 AM3871 |
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