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NX3L1G53 Datasheet(PDF) 13 Page - NXP Semiconductors |
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NX3L1G53 Datasheet(HTML) 13 Page - NXP Semiconductors |
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13 / 24 page ![]() NX3L1G53 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved. Product data sheet Rev. 7 — 8 February 2013 13 of 24 NXP Semiconductors NX3L1G53 Low-ohmic single-pole double-throw analog switch a. Test circuit b. Input and output measurement points Fig 17. Test circuit for measuring break-before-make timing 001aah458 RL S GND E Z Y0 VIL Y1 VCC VI CL G V VO VEXT = 1.5 V 001aag572 VI tb-m VO 0.9VO 0.9VO 0.5VI Test data is given in Table 11. Definitions test circuit: RL = Load resistance. CL = Load capacitance including jig and probe capacitance. VEXT = External voltage for measuring switching times. VI may be connected to S or E. Fig 18. Test circuit for measuring switching times 001aah459 RL S GND E Z Y0 VIL Y1 VCC VI CL G V VO VEXT = 1.5 V switch 1 2 |
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