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PIC16CE623-04/SS Datasheet(PDF) 62 Page - Microchip Technology |
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PIC16CE623-04/SS Datasheet(HTML) 62 Page - Microchip Technology |
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62 / 108 page ![]() PIC16CE62X DS40182A-page 62 Preliminary © 1998 Microchip Technology Inc. FIGURE 10-17: WATCHDOG TIMER BLOCK DIAGRAM FIGURE 10-18: SUMMARY OF WATCHDOG TIMER REGISTERS Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 2007h Config. bits --- BODEN CP1 CP0 PWRTE WDTE FOSC1 FOSC0 81h OPTION RBPU INTEDG T0CS T0SE PSA PS2 PS1 PS0 Legend: Shaded cells are not used by the Watchdog Timer. Note: _ = Unimplemented location, read as “0” + = Reserved for future use From TMR0 Clock Source (Figure 7-6) To TMR0 (Figure 7-6) Postscaler Watchdog Timer M U X PSA 8 - to -1 MUX PSA WDT Time-out 1 0 0 1 WDT Enable Bit PS<2:0> • • Note: T0SE, T0CS, PSA, PS0-PS2 are bits in the OPTION register. 8 MUX 62X.bk Page 62 Tuesday, March 10, 1998 3:40 PM |
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