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A13 Datasheet(PDF) 32 Page - List of Unclassifed Manufacturers |
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A13 Datasheet(HTML) 32 Page - List of Unclassifed Manufacturers |
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32 / 55 page  Allwinner Technology CO., Ltd. A13 Datasheet v1.30 Copyright © 2012 Allwinner Technology. All Rights Reserved. 31 December 10, 2012 7. PWM 7.1. Overview The output of the PWM is a toggling signal whose frequency and duty cycle can be modulated by its programmable registers. Each channel has a dedicated internal 16-bit up counter. If the counter reaches the value stored in the channel period register, it resets. At the beginning of a count period cycle, the PWMOUT is set to activate state and count from 0x0000. The PWM divider divides the clock (24MHz) by 1-4096 according to the pre-scalar bits in the PWM control register. In PWM cycle mode, the output will be a square waveform; the frequency is set to the period register. In PWM pulse mode, the output will be a positive pulse or a negative pulse. 7.2. PWM Signal Description Signal Name Description Type Pin Name PWM PWM output O PB2 Table 7. PWM Signal Description |
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