A13 datasheet(37/55 Pages) ETC2

37 / 55 page

Allwinner Technology CO., Ltd.

A13 Datasheet v1.30

December 10, 2012

13.

NAND Flash Controller

13.1.

Overview

The NFC supports all NAND/MLC flash memory available in the market and new types can be

supported by software re-configuration as well. It can support 2 NAND flash with 3.3 V voltage

supply. There are 2 separate chip select lines (CE#) to connect up to 2 flash chips with2 R/B

signals.

The On-the-fly error correction code (ECC) is built in NFC to enhance reliability. BCH is

implemented to detect and correct up to 64 bits error per 512 or 1024 bytes data. The on chip ECC

and parity checking circuitry of NFC frees CPU for other tasks. The ECC function can be disabled

by software.

The data can be transferred by DMA or by CPU memory-mapped IO method. The NFC provides

automatic timing control to read or write external Flash. The NFC maintains the proper relativity

for CLE, CE# and ALE control signal lines. Three kinds of modes are supported for serial read

access: Mode 0 is the conventional serial access, Mode 1 for EDO type, and Mode 2 is for

extension EDO type. In addition, NFC can monitor the status of R/B# signal line.

Block management and wear leveling management are implemented in software.

The NFC features:



Support SLC/MLC/TLC flash and EF-NAND memory



Software configure seed to randomize engine



Software configure method for adaptability to a variety of system and memory types



Support 8-bit Data Bus Width



Support 1024, 2048, 4096, 8192, 16384 bytes size per page



Support 3.3 V voltage supply Flash

A13 Datasheet(PDF) 37 Page - List of Unclassifed Manufacturers