L8708H datasheet(29/66 Pages) ZILOG

29 / 66 page

Z86L88/81/86/87/89/73

IR/Low-Voltage Microcontroller

DS96LV00800

P R E L I M I N A R Y

port registers, 236 general-purpose registers, and 16 con-

trol and status registers (R0-R3, R4-R239, and R240-

R255, respectively), Plus two expanded registers groups

(Banks D and F). Instructions can access registers directly

or indirectly through an 8-bit address field. This allows a

short, 4-bit register address using the Register Pointer

(Figure 23). In the 4-bit mode, the register file is divided

into 16 working register groups, each occupying 16 contin-

uous locations. The Register Pointer addresses the start-

ing location of the active working register group.

Note: Working register group E0-EF can only be access-

ed through working registers and indirect addressing

modes.

Stack. The Z86LXX external data memory or the internal

(R255) is used for the internal stack that resides in the gen-

eral-purpose registers (R4-R239). SPH is used as a gen-

eral-purpose register only when using internal stacks.

Note: When SPH is used as a general-purpose register

and Port 0 is in address mode, the contents of SPH will be

loaded into Port 0 whenever the internal stack is accessed.

COUNTER/TIMER REGISTER DESCRIPTION

HI8(D)%0B: Holds the captured data from the output of the

8-bit Counter/Timer0. This register is typically used to hold

the number of counts when the input signal is 1.

L08(D)%0A: Holds the captured data from the output of

the 8-bit Counter/Timer0. This register is typically used to

hold the number of counts when the input signal is 0.

Figure 22. Register Pointer Register

D6 D5

D4 D3

Expanded Register

File Pointer

Working Register

Pointer

R253 RP

Default Setting After Reset = 0000 0000

Figure 23. Register Pointer

The upper nibble of the register file address

provided by the register pointer specifies

the active working-register group

R253

I/O Ports

Specified Working

The lower nibble

of the register

file address

provided by the

instruction points

to the specified

R15 to R0

R15 to R4 *

R3 to R0 *

Table 4. Expanded Register Group D

(D)%0C

Reserved

(D)%0B

HI8

(D)%0A

LO8

(D)%09

HI16

(D)%08

LO16

(D)%07

TC16H

(D)%06

TC16L

(D)%05

TC8H

(D)%04

TC8L

(D)%03

Reserved

(D)%02

CTR2

(D)%01

CTR1

(D)%00

CTR0

Field

Bit Position

Description

T8_Capture_HI

76543210

Captured Data

No Effect

Field

Bit Position

Description

T8_Capture_L0

76543210

Captured Data

No Effect

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