DLPC910 datasheet(40/50 Pages) TI1

40 / 50 page

DLPC910

DLPS064A – SEPTEMBER 2015 – REVISED OCTOBER 2015

www.ti.com

PCB Fabrication:

•

Configuration: Asymmetric dual strip-line

•

Etch thickness : 1.0-oz copper (1.2 mil)

•

Flex etch thickness: 0.5-oz copper (0.6 mil)

•

Single-ended signal impedance: 50

Ω (±10%)

•

Differential signal impedance: 100

Ω (±10%)

PCB Stack-up:

•

Ground planes for proper return path.

•

Power planes for proper supply to circuits.

•

Dielectric material with a low Loss-Tangent, for example: Hitachi 679gs or equivalent, (Er): 3.8 (nominal).

10.1.2 Signal Layers

The PCB signal layers should follow typical good practice guidelines including:

•

Layer changes should be minimized for single-ended signals.

•

Individual differential pairs can be routed on different layers, but the signals of a given pair should not change

layers.

•

Stubs should be avoided.

•

Low-frequency signals should be routed on the outer layers.

•

Differential pair signals should be routed first.

•

Pin swapping on components is not allowed.

•

Polarized capacitors should have the same orientation.

The PCB should have a solder mask on the top and bottom layers.

•

The mask should not cover the vias.

•

Except for fine pitch devices (pitch

≤ 0.032 inches). The copper pads and the solder mask cutout should be of

the same size.

•

Solder mask between pads of fine pitch devices should be removed.

•

In the BGA package, the copper pads and the solder mask cutout should be of the same size.

High-speed connectors that meet the following requirements should be used:

•

Differential crosstalk: < 5%

•

Differential impedance: 90 to 110

Ω for all LVDS signal pairs

Routing requirements for right-angle connectors:

•

When using right-angle connectors, LVDS signal P-N pairs should be routed in the same row to minimize

delay mismatch.

•

When using right-angle connectors, propagation delay difference for each row should be accounted for on

associated PCB etch lengths.

10.1.3 General PCB Routing

Fiducials for automatic component insertion should be 0.05-inch copper with a 0.1-inch cutout (antipad). Fiducials

for optical auto insertion are placed on three corners of both sides of the PCB.

10.1.3.1 Trace Minimum Spacing

BGA escape routing can be routed with 3.7-mils width and 4.3-mils spacing, as long as the escape nets are less

than 1-inch long, to allow two traces to fit between vias. After signals escape the BGA field, trace width should be

widened to achieve the desired impedance and spacing.

All single-ended 50-ohm signals must have a minimum spacing of 10 mils relative to other signals. Other special

trace spacing requirements are listed in Table 20.

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