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LNBH25S Datasheet(PDF) 10 Page - STMicroelectronics |
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LNBH25S Datasheet(HTML) 10 Page - STMicroelectronics |
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10 / 37 page ![]() Application information LNBH25S 10/37 DocID026736 Rev 2 Figure 4: Surge protection circuit For this purpose, the use of the LNBTVSxx surge protection diodes specifically designed by ST is recommended. The selection of the LNBTVSxx diodes should be based on the maximum peak power dissipation supported by the diode (see the LNBTVS datasheet for further details). 2.10 FLT (fault flag) In order to get an immediate feedback on diagnostic status, the LNBH25S is equipped with a dedicated fault flag pin (FLT). In case of overload (OLF bit=1) or overheating (OTF bit=1) or if “power no good” (PNG bit=1) condition is detected, the FLT pin (open drain output) is set to low and is kept low until the relevant activating diagnostic bit is cleared. Diagnostic bits: OLF, OTF and PNG, once activated, are kept latched to “1” until the root cause is removed and a new register reading operation is performed by the microprocessor. The FLT pin has to be connected to a positive voltage (5 V max.) by a pull-up resistor. 2.11 VMON (output voltage diagnostic) When the device output voltage is active (VOUT pin), its value is internally monitored and, as long as the output voltage level is below the guaranteed limits, VMON I²C bit is set to “1”. See Table 17: "Output voltage diagnostic (VMON bit, status 1 register) characteristics" for more details. 2.12 TMON (22 kHz tone diagnostic) The 22 kHz tone can be internally detected and monitored if DETIN pin is connected to the LNB output bus, see typical application circuit in Figure 7: "DiSEqC 2.x application circuit", through a decoupling capacitor. The tone diagnostic function is provided with TMON I²C bit. If the 22 kHz tone amplitude and/or the tone frequency is out of the guaranteed limits, see Table 19: "22 kHz tone diagnostic (TMON bit, status 2 register) characteristics", TMON I²C bit is set to “1”. 2.13 TDET (22 kHz tone detection) When a 22 kHz tone presence is detected on DETIN pin, TDET I²C bit is set to “1”. |
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