LNBH25S datasheet(12/37 Pages) STMICROELECTRONICS

12 / 37 page

Application information

LNBH25S

12/37

DocID026736 Rev 2

2.20

OLF (overcurrent and short-circuit protection and

diagnostic)

To reduce the total power dissipation during an overload or a short-circuit condition, the

device is provided with a dynamic short-circuit protection. It is possible to set the short-

circuit current protection either statically (simple current clamp) or dynamically by the PCL

bit of I²C data 3 register. When the PCL (pulsed current limiting) bit is set low, the

overcurrent protection circuit works dynamically: as soon as an overload is detected, the

output current is provided for TON time (90 ms or 180 ms typ., according to the TIMER bit

programmed in the data 3 register) and after that, the output is set in shutdown for TOFF

time of typically 900 ms. Simultaneously, the diagnostic OLF I²C bit of the system register

is set to “1” and the FLT pin is set to low level. After this time has elapsed, the output is

resumed for a time TON. At the end of TON, if the overload is still detected, the protection

circuit cycles again through TOFF and TON. At the end of a full TON in which no overload is

detected, normal operation is resumed and the OLF diagnostic bit is reset to low after a

and it is determined by an internal timer. This dynamic operation can reduce the power

dissipation in short-circuit condition, assuring excellent power-on startup in most conditions.

However, there may be some cases in which a highly capacitive load on the output may

cause a difficult startup when the dynamic protection is chosen. This can be solved by

initiating any power startup in static mode (PCL=1) and, then, switching to the dynamic

mode (PCL=0) after a specified period of time depending on the output capacitance. Also,

in static mode, the diagnostic OLF bit goes to “1” (and the FLT pin is set to low) when the

current clamp limit is reached and returns low when the overload condition is cleared and

After the overload condition is removed, normal operation can be resumed in two ways,

according to the OLR I²C bit on the data 4 register.

If OLR=1, all VSEL 1..4 bits are reset to “0” and LNB output (VOUT pin) is disabled. To re-

enable the output stage, VSEL bits have to be set again by the microprocessor, and the

OLF bit is reset to “0” after a register reading operation.

If OLR=0, output is automatically re-enabled as soon as the overload condition is removed,

and the OLF bit is reset to “0” after a register reading operation.

2.21

OTF (thermal protection and diagnostic)

The LNBH25S is also protected against overheating: when the junction temperature

exceeds 150 °C (typ.), the step-up converter and the linear regulator shut off, the

diagnostic OTF bit in the status 1 register is set to “1” and the FLT pin is set to low level.

After the overtemperature condition is removed, normal operation can be resumed in two

ways, according to the THERM I²C bit on the data 4 register.

If THERM=1, all VSEL 1..4 bits are reset to “0” and LNB output (VOUT pin) is disabled. To

re-enable the output stage, VSEL bits must be set again by the microprocessor, while the

OTF bit is reset to “0” after a register reading operation.

If THERM=0, output is automatically re-enabled as soon as the overtemperature condition

is removed, while the OTF bit is reset to “0” after a register reading operation.

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