Data Sheet

ADuM3151/ADuM3152/ADuM3153

MCLK

3

MO

4

20

19

18

17

MI

5

MSS

6

16

15

14

13

12

SCLK

SI

SO

SSS

10

11

ADuM3152

(Not to Scale)

TOP VIEW

Figure 6. ADuM3152 Pin Configuration

Table 21. ADuM3152 Pin Function Descriptions

Pin No.

Mnemonic Direction Description

1

Power

2, 10

Return

Ground 1. Ground reference for Isolator Side 1.

3

MCLK

Clock

SPI Clock from the Master Controller.

4

MO

Input

SPI Data from the Master MO/SI Line.

5

MI

Output

SPI Data from the Slave to the Master MI/SO Line.

6

MSS

Input

Slave Select from the Master. This signal uses an active low logic. The slave select pin requires a 10 ns

setup time from the next clock or data edge.

7

Input

Low Speed Data Input A.

8

Output

Low Speed Data Output B.

9

Output

Low Speed Data Output C.

11, 19

Return

Ground 2. Ground reference for Isolator Side 2.

12

Input

Low Speed Data Input C.

13

Input

Low Speed Data Input B.

14

Output

Low Speed Data Output A.

15

SSS

Output

Slave Select to the Slave. This signal uses an active low logic.

16

SO

Input

SPI Data from the Slave to the Master MI/SO Line.

17

SI

Output

SPI Data from the Master to the Slave MO/SI Line.

18

SCLK

Output

SPI Clock from the Master Controller.

20

Power

Rev. A | Page 15 of 22