1OE

1LE

1D1

To Seven Other Channels

1Q1

1

48

47

2

C1

1D

2OE

2LE

2D1

2Q1

To Seven Other Channels

24

25

36

C1

1D

13

12

SN74LVTH16373-EP

SCBS778B – NOVEMBER 2003 – REVISED JUNE 2016

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8 Detailed Description

8.1 Overview

The SN74LVTH16373 is a 16-bit transparent D-type latch with tri-state outputs designed for low-voltage (3.3-V)

VCC operation, but with the capability to provide a TTL interface to a 5-V system environment. This device is

particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

This device can be used as two 8-bit latches or one 16-bit latch. When the latchenable (LE) input is high, the Q

outputs follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the levels set up at the D

inputs.

A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or

low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the

bus lines significantly. The high impedance state and the increased drive provide the capability to drive bus lines

without interface or pullup components. OE does not affect internal operations of the latch. Old data can be

retained or new data can be entered while the outputs are in the high-impedance state.

8.2 Functional Block Diagram

Figure 5. Logic Diagram (Positive Logic)

Figure 6. Logic Diagram (Positive Logic)

8.3 Feature Description

The SN74LVTH16373 included active bus-hold circuitry that holds unused or undriven inputs at a valid logic

state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended. Additionally, it features

power up three state that will keep the outputs in high-impedance state during power up or power down when

VCC is between 0 and 1.5 V. This prevents driver conflict during power up.

To ensure the high-impedance state above 1.5 V, OE should be tied to VCC through a pullup resistor; the

minimum value of the resistor is determined by the current-sinking capability of the driver.

disables the outputs, preventing damaging current backflow through the device when it is powered down.

Table 2. Function Table (Each 8-Bit Section)

INPUTS

OUTPUT

Q

OE

LE

D

L

H

H

H

L

H

L

L

L

L

X

H

X

X

Z

8.4 Device Functional Modes

Device functions as tristatable 8 or 16-bit latch per function table defined in Table 2.