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LM4937RL/NOPB Datasheet(PDF) 10 Page - Texas Instruments

Part # LM4937RL/NOPB
Description  Audio Sub-System with OCL Stereo Headphone Output and RF Suppression
PDF  41 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

LM4937RL/NOPB Datasheet(HTML) 10 Page - Texas Instruments

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Start
Condition
Stop
Condition
Data
ACK
SDA
SCL
TI2CSET
TI2CHOLD
TI2CSET
TI2CSET
ACK
ACK
Data
ACK
P
S
6 - 0
7 - 1
0
7 - 1
0
W
Host
Address
Start
Condition
SDA
SCL
Register
Address
Stop
Condition
ENB
SCK
SDI
TSPISETENB
TSPIHOLDD
TSPISETD
TSPICH
TSPIT
TSPICL
TSPIHOLDENB
Register Address
Data
ENB
SCK
SDI
7
0
7
0
LM4937
SNAS369J – OCTOBER 2006 – REVISED MAY 2013
www.ti.com
SYSTEM CONTROL
The LM4937 is controlled via either a two wire I2C compatible interface or three wire SPI interface, selectable
with the MODE pin. This interface is used to configure the operating mode, interfaces, data converters, mixers
and amplifiers. The LM4937 is controlled by writing 8 bit data into a series of write-only registers, the device is
always a slave for both type of interfaces.
THREE WIRE, SPI INTERFACE (MODE = 1)
Three Wire Mode Write Bus Transaction
Three Wire Mode Write Bus Timing
Figure 3. Three Wire Mode Write Bus
When the part is configured as an SPI device and the enable (ENB) line is lowered the serial data on SDI is
clocked in on the rising edge of the SCK line. The protocol used is 16bit, MSB first. The upper 8 bits (15:8) are
used to select an address within the device, the lower 8 bits (7:0) contain the updated data for this register.
TWO WIRE I
2C COMPATIBLE INTERFACE (MODE = 0)
Figure 4. Two Wire Mode Write Bus Transaction
Figure 5. Two Wire Mode Write Bus Timing
Figure 6. Two Wire Mode Write Bus
10
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Product Folder Links: LM4937



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