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CS8952T Datasheet(PDF) 29 Page - Cirrus Logic |
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CS8952T Datasheet(HTML) 29 Page - Cirrus Logic |
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29 / 86 page ![]() DS206TPP2 29 CS8952T CrystalLAN™ 100BASE-X and 10BASE-T Transceiver CIRRUS LOGIC ADVANCED PRODUCT DATABOOK CONFIGURATION The CS8952T can be configured in a variety of ways. All control and status information can be ac- cessed via the MII Serial Management Interface. Additionally, many configuration options can be set at power-up or reset times via individual control lines. Some configuration capabilities are available at any time via individual control lines. Configuration At Power-up/Reset Time At power-up and reset time, the following pins are used to configure the CS8952T. Table 7. Reset Configuration Pins Configuration Via Control Pins The following pins are for dedicated control signals and can be used at any time to configure the CS8952T. Table 8. Dedicated Control Pins Configuration via the MII The CS8952T supports configuration by software control through the use of 16-bit configuration and status registers accessed via the MDIO/MDC pins (MII Management Interface). The first seven regis- ters are defined by the IEEE 802.3 specification. Additional registers extend the register set to pro- vide enhanced monitoring and control capabilities. Pin Name Function 10BT_SER Select 10BASE-T serial mode AN[1:0] Select auto-negotiation mode BP4B5B Bypass 4B5B coders BPALIGN Bypass 4B5B coders and scramblers ISODEF Electrically isolate MII after reset LPSTRT Start in low power mode PHYAD[4:0] Set MII PHY address REPEATER Control definition of CRS pin, enable carrier integrity monitor and SQE func- tion MII_DRV Set MII driver strength TCM Set TX_CLK mode TXSLEW[1:0] Set 100BASE-TX transmitter output slew rate Pin Name Function LPBK Enter loopback mode PWRDN Enter power-down mode RESET Reset |
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