SST49LF016C datasheet(10/43 Pages) MICROCHIP

10 / 43 page

DS20005029B

02/16

16 Mbit LPC Serial Flash

SST49LF016C

EOL Data Sheet

Design Considerations

SST recommends a high frequency 0.1 µF ceramic capacitor to be placed as close as possible

between VDD and VSS less than 1 cm away from the VDD pin of the device. Additionally, a low fre-

quency 4.7 µF electrolytic capacitor from VDD to VSS should be placed within 1 cm of the VDD pin. If you

use a socket for programming purposes add an additional 1-10 µF next to each socket. The RST# pin

must remain stable at VIH for the entire duration of an Erase operation. WP#/AAI must remain stable at

VIH for the entire duration of the Erase and Program operations for non-Boot Block sectors. To write

data to the top Boot Block sectors, the TBL# pin must also remain stable at VIH for the entire duration

of the Erase and Program operations.

Mode Selection

The SST49LF016C flash memory device operates in two distinct interface modes: the LPC mode and

the Auto Address Increment (AAI) mode. The WP#/AAI pin is used to set the interface mode selection.

The device is in AAI mode when the WP#/AAI pin is set to the Supervoltage VH (9±0.5V), and in the

LPC mode when the WP#/AAI is set to VIL/VIH. The mode selection must be configured prior to device

operation.

SST49LF016C Datasheet(PDF) 10 Page - Microchip Technology