HT46R23 datasheet(18/42 Pages) HOLTEK

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HT46R23

Rev. 1.30

August 17, 2001

converter circuit is power on. The EOC bit (bit6 of the

ADCR) is end of A/D conversion flag. Check this bit to

know when A/D conversion is completed. The START

bit of the ADCR is used to begin the conversion of the

A/D converter. Giving START bit a rising edge and fall-

ing edge means that the A/D conversion has started. In

order to ensure the A/D conversion is completed, the

START should remain at ²0² until the EOC is cleared to

²0² (end of A/D conversion).

The bit 7 of the ACSR is used for testing purposes only.

It can not be used by the users. The bit1 and bit0 of the

ACSR are used to select A/D clock sources.

Label

(ACSR) Bits

Function

ADCS0

ADCS1

Selects the A/D converter clock

source

00= system clock¸2

01= system clock¸8

10= system clock¸32

11= undefined

2~6 Unused bit, read as ²0²

TEST

7 For test mode used only

ACSR register

Label

(ADCR) Bits

Function

ACS0

ACS1

ACS2

Defines the analog channel select.

PCR0

PCR1

PCR2

Defines the port B configuration select.

If PCR0, PCR1 and PCR2 are all zero,

the ADC circuit is power off to reduce

power consumption

EOC

Provides response at the end of the

A/D conversion.

(0= end of A/D conversion)

START

7 Starts the A/D conversion. (0®1®0

=start; 0®1® reset A/D converter)

ADCR register

ACS2 ACS1 ACS0

Analog Channel

000

001

010

011

100

101

110

111

Analog input channel selection

When the A/D conversion is completed, the A/D inter-

rupt request flag is set. The EOC bit is set to ²1² when

the START bit is set from ²0² to ²1².

Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0

ADRL

D1 D0 ¾ ¾¾¾¾¾

ADRH

D9 D8 D7 D6 D5 D4 D3 D2

Note: *: D0~D9 is A/D conversion result data bit

LSB~MSB.

PCR2

PCR1

PCR0

76543

PB7

PB6

PB5

PB4

PB3

PB2

PB1

PB0

PB7

PB6

PB5

PB4

PB3

PB2

PB1

PB7

PB6

PB5

PB4

PB3

PB2

PB7

PB6

PB5

PB4

PB3

PB7

PB6

PB5

PB4

PB7

PB6

PB5

PB7

PB6

A7A6A5A4A3

A1A0

Port B configuration

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