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35

HMC702LP6CE

v10.0812

14 GHz 16-BIT FRACTIONAL-N PLL

Table 32. Reg 1Bh GPO Control Register

Bit

Type

Name

Default

Description

3:0

r/W

gpo_sel

0

Selects data to be driven on GPo ports

gpo_sel<3:0> = 0000

GPo3 <=gposel_0_data<2>

GPo2 <= gposel_0_data<1>

GPo1 <= gposel_0_data<0>

gpo_sel<3:0> = 0001

GPo3 <= xref_clk_in

GPo2 <= ref_clk_in

GPo1 <= vco_div_clkin

gpo_sel<3:0> = 0010

GP03 <= pfd_up_in

GP02 <= pfd_dn_in

GP01 <= LKD_monost_window

gpo_sel<3:0> = 0011

GP03 <= pfd_sat_ref_in

GP02 <= pfd_sat_vco_div_in

GP01 <= delta_integer_cycslip_sel, this strobe

holds the gain of the PFD at max for anti-cycle

slipping

gpo_sel<3:0> = 0100

GP03 <= xref_clk_in

GP02 <= xref_sin_in

GP01 <= sd_frac_strobe_sync, internally

synchronized frac strobe

gpo_sel<3:0> = 0101

reserved

gpo_sel<3:0> = 0110

GP03 <= SD_intz1<1>

GP02 <=SD_intz1<2>

GP01 <= SD_intz1<3>

3-bit quantized version of the Vco phase

gpo_sel<3:0> = 0111

GP03 <= aux_clk

GP02 <= ringosc_test

GP01 <= clk_SD

gpo_sel<3:0> = 1000

GP03 <= 00

GP02 <= ramp_busy

GP01 <= reserved

gpo_sel<3:0> = 1001

not used

gpo_sel<3:0> = 1010

GP03 <= Δ∑ Quantizer output 3rd lsb

GP02 <= Δ∑ Quantizer output 2nd lsb

GP01 <= Δ∑ Quantizer output lsb

6:4

r/W

gpo_sel_0_data

0

this data is driven on gpo if gpo_sel==0

7

r/W

gpo_dig_drive_en

0

enables tri-state drivers on GPo output pads

10:8

r/W

gpo_ind_drive_dis

000

000 = all GPo pad drivers enabled

xx1 = disable GPo1 pad driver

x1x = disable GPo2 pad driver

1xx = disable GPo3 pad driver

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