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HMC702LP6CE Datasheet(PDF) 27 Page - Analog Devices

Part # HMC702LP6CE
Description  14 GHz 16-BIT FRACTIONAL-N PLL
PDF  38 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

HMC702LP6CE Datasheet(HTML) 27 Page - Analog Devices

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For price, delivery and to place orders: Hittite Microwave Corporation, 2 Elizabeth Drive, Chelmsford, MA 01824
Phone: 978-250-3343
Fax: 978-250-3373
Order On-line at www.hittite.com
Application Support: Phone: 978-250-3343 or apps@hittite.com
27
HMC702LP6CE
v10.0812
14 GHz 16-BIT FRACTIONAL-N PLL
Main Serial Port READ Operation
the synthesizer uses the multi-purpose pin, LD_SDO, for both Lock Detect and Serial Data out (SDo) functions. the
registers lkd_to_sdo_automux_en (Reg1A<12>) and lkd_to_sdo_always (Reg1A<13> table 31) determine how the
Data output pin is muxed with the Lock Detect function. if both of the registers are cleared, then the pin is exclusively
SDo. if automux is enabled, the pin switches to SDo when the rD function is sensed on the 1st rising edge of ScLK.
if lkd_to_sdo_always is set, then the pin LD_SDO is dedicated for Lock Detect only, and it is not possible to read from
the synthesizer.
a typical rEaD cycle is shown in Figure 20.
a. the Master (host) asserts both SEn (Serial Port Enable) and SDi to indicate a rEaD
cycle, followed by a rising edge ScLK
b. the slave (synthesizer) reads SDi on the 1st rising edge of ScLK after SEn. SDi high initiates
the rEaD cycle (rD)
c. Host places the six address bits on the next six falling edges of ScLK, MSB first.
d. Slave registers the address bits on the next six rising edges of ScLK (2-7).
e. Slave places the 24 data bits on the next 24 rising edges of ScK (8-31), MSB first .
f. Host registers the data bits on the next 24 falling edges of ScK (8-31).
g. SEn is de-asserted on or after the 32nd falling edge of ScLK.
h. the 32nd falling edge of ScLK completes the cycle
Figure 20. Serial Port Timing Diagram - READ
REGISTER MAP
Table 5. Reg 00h Chip ID (Read Only) Register
Bit
Type
Name
Width
Default
Description
[23:0]
ro
chip iD
24
581504h
chip iD
Table 6. Reg 00h Strobe (Write Only) Register
Bit
Type
Name
Width
Default
Description
0
Str
global_swrst_regs
1
0
Strobe to soft reset the SPi registers
1
Str
global_swrst_dig
1
0
Strobe to soft reset the rest of digital
2
Str
mcnt_resynch
1
0
reserved
3
Str
tsens_spi_strobe
1
0
Strobe to clock the temperature measurement on
demand
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
For price, delivery, and to place orders: Analog Devices, Inc.,
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106
Phone: 781-329-4700 • Order online at www.analog.com
Application Support: Phone: 1-800-ANALOG-D



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