ADF4355-2 datasheet(35/38 Pages) AD

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ADF4355-2

Data Sheet

Rev. B | Page 34 of 37

APPLICATIONS INFORMATION

DIRECT CONVERSION MODULATOR

Direct conversion architectures are increasingly used to implement

base station transmitters. Figure 44 shows how to use Analog

Devices, Inc., devices to implement such a system.

The circuit block diagram shows the AD9761 TxDAC® used

with the ADL5375. The use of a dual integrated DAC, such as

the AD9761, ensures minimum error contribution (over

temperature) from this portion of the signal chain.

The local oscillator (LO) is implemented using the ADF4355-2.

The low-pass filter was designed using the ADIsimPLL design

tool for a PFD of 61.44 MHz and a closed-loop bandwidth of

20 kHz.

The LO ports of the ADL5375 can be driven differentially from

the complementary RFOUTA+/RFOUTA− outputs of the ADF4355-2.

Differential drive gives better second-order distortion performance

than a single-ended LO driver and eliminates the use of a balun

to convert from a single-ended LO input to the more desirable

differential LO input for the ADL5375.

The ADL5375 accepts LO drive levels from −6 dBm to +6 dBm.

The optimum LO power can be software programmed on the

ADF4355-2, which allows levels from −4 dBm to +5 dBm from

each output.

The RF output is designed to drive a 50 Ω load; however, it must be

ac-coupled, as shown in Figure 44. If the I and Q inputs are driven

in quadrature by 2 V p-p signals, the resulting output power

from the ADL5375 modulator is approximately 2 dBm.

AD9761

TxDAC

REFIO

FSADJ

MODULATED

DIGITAL

DATA

QOUTB

IOUTA

IOUTB

QOUTA

2kΩ

LOW-PASS

FILTER

LOW-PASS

FILTER

IBBP

IBBN

QBBP

QBBN

LOIP

LOIN

51Ω

ADL5375

RFOUT

QUADRATURE

PHASE

SPLITTER

DSOP

1500pF

390pF

33nF

3.3kΩ

1kΩ

ADF4355-2

VVCO

CPGND

AGND

RFOUTB–

RFOUTB+

CPOUT

1nF

4.7kΩ

RSET

DATA

CLK

REFINA

REFINB

FREFIN

VTUNE

DVDD AVDD

AVDD

13 18 21

VVCO

AGNDVCO

PDBRF

SDGND

VREGVCO

VBIAS

VREF

10pF

0.1µF 10pF

0.1µF

RFOUTA–

RFOUTA+

7.5nH

1nF

VOUT

VRF

1nF

FREFIN

VDD

MUXOUT

LOCK

DETECT

CREG1

100nF

CREG2

100nF

LPF

Figure 44. Direct Conversion Modulator

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