AD9528 datasheet(63/68 Pages) AD

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AD9528

Data Sheet

Rev. C | Page 62 of 67

Table 62. SYSREF Control

Address

Bits

Bit Name

Description

0x0402

SYSREF request method

0 = SPI controlled

1 = Pin controlled

[6:5]

SYSREF pattern generator trigger

control, Bits[1:0]

SYSREF pattern generator trigger control

0x: level sensitive, active high

10: edge sensitive, rising edge

11: edge sensitive, falling edge

SYSREF pattern generator clock

source

0 = PLL2 feedback divider

1 = PLL1 out

Resample clock source for external

SYSREF

0 = device clock

1 = PLL1 out

[2:1]

SYSREF test mode, Bits[1:0]

SYSREF test mode

00 = GND

01 = VDD

1x = counter output clock

SYSREF reset

0x0403

[7:6]

SYSREF source, Bits[1:0]

SYSREF source

00 = external

01 = external resampled

10 = internal

[5:4]

SYSREF pattern generator mode,

Bits[1:0]

Pattern mode

00 = N-shot

01 = continuous

10 = PRBS

11 = stop

[3:1]

N-shot mode, Bits[1:0]

N-shot mode

001 = 1 pulse

010 = 2 pulses

011 = 4 pulses

100 = 6 pulses

101 = 8 pulses

Others = 1 pulse

SPI SYSREF request

In N-shot mode, the SYSREF pattern starts at the transition of this bit from 0 to 1 and bit

automatically clears after the pattern completes

In continuous or PRBS mode, SYSREF pattern starts at the transition of this bit from 0 to

1 and the bit stays set to 1 until user clears the bit; when the user clears the bit, the

SYSREF pattern stops

Table 63. SYSREF_IN Receiver Control

Address

Bits

Bit Name

Description

0x0404

[7:3]

Reserved

Reserved.

SYSREF IN receiver power-down

Enables control over power-down of the SYSREF input receivers.

1 = power-down control enabled (default).

0 = both receivers enabled.

Single-ended source negative

input (CMOS mode)

Selects which single-ended input pin is enabled when in the SYSREF single-ended

receiver mode (Register 0x0404, Bit 0 = 0).

1 = negative receiver from SYSREF input (SYSREF_IN pin) selected.

0 = positive receiver from SYSREF input (SYSREF_IN pin) selected (default).

SYSREF differential receiver

enable

1 = differential receiver mode, single-ended receivers disabled.

0 = single-ended receiver mode (default).

AD9528 Datasheet(PDF) 63 Page - Analog Devices

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