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SN65LVDT2DBVT Datasheet(PDF) 14 Page - Texas Instruments |
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SN65LVDT2DBVT Datasheet(HTML) 14 Page - Texas Instruments |
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14 / 42 page ![]() D Y Z R A B SN65LVDS1 SN65LVDS2 & SN65LVDT2 (110 UHVLVWRUIRUµ/9'7RQO\) SN65LVDS1, SN65LVDS2, SN65LVDT2 SLLS373L – JULY 1999 – REVISED DECEMBER 2014 www.ti.com 9 Detailed Description 9.1 Overview The SN65LVDS1 device is a single-channel, low-voltage differential signaling (LVDS) line driver. It operates from a single supply that is nominally 3.3 V, but can be as low as 2.4 V and as high as 3.6 V. The input signal to the SN65LVDS1 is an LVTTL signal. The output of the device is a differential signal complying with the LVDS standard (TIA/EIA-644). The differential output signal operates with a signal level of 340 mV, nominally, at a common-mode voltage of 1.2 V. This low differential output voltage results in a low emitted radiated energy, which is dependent on the signal slew rate. The differential nature of the output provides immunity to common- mode coupled signals that the driven signal may experience. The SN65LVDS1 device is intended to drive a 100- Ω transmission line. This transmission line may be a printed- circuit board (PCB) or cabled interconnect. With transmission lines, the optimum signal quality and power delivery is reached when the transmission line is terminated with a load equal to the characteristic impedance of the interconnect. Likewise, the driven 100- Ω transmission line should be terminated with a matched resistance. The SN65LVDS2 device is a single-channel LVDS line receiver. It also operates from a single supply that is nominally 3.3 V, but can be as low as 2.4 V and as high as 3.6 V. The input signal to the SN65LVDS2 is a differential LVDS signal. The output of the device is a LVTTL digital signal. This LVDS receiver requires ±100 mV of input signal to determine the correct state of the received signal compliant LVDS receivers can accept input signals with a common-mode range between 0.05 V and 2.35 V. As the common-mode output voltage of an LVDS driver is 1.2 V, the SN65LVDS2 correctly determines the line state when operated with a 1-V ground shift between driver and receiver. The SN65LVDT2 device is also a single-channel LVDS receiver. This device differs from the SN65LVDS2 in that it incorporates an integrated termination resistor along with the receiver. This termination would take the place of the matched load line termination mentioned above. The SN65LVDT2 can be used in a point-to-point system or in a multidrop system when it is the last receiver on the multidrop bus. The SN65LVDT2 device should not be used at every node in a multidrop system as this would change the loaded bus impedance throughout the bus resulting in multiple reflections and signal distortion. 9.2 Functional Block Diagram 9.3 Feature Description 9.3.1 SN65LVDS1 Features 9.3.1.1 Driver Output Voltage and Power-On Reset The SN65LVDS1 driver operates and meets all the specified performance requirements for supply voltages in the range of 2.6 V to 3.6 V. When the supply voltage drops below 1.5 V (or is turning on and has not yet reached 1.5 V), power-on reset circuitry set the driver output to a high-impedance state. 9.3.1.2 Driver Offset An LVDS-compliant driver is required to maintain the common-mode output voltage at 1.2 V (±75 mV). The SN65LVDS1 incorporates sense circuitry and a control loop to source common-mode current and keep the output signal within specified values. Further, the device maintains the output common-mode voltage at this set point over the full 2.6-V to 3.6-V supply range. 14 Submit Documentation Feedback Copyright © 1999–2014, Texas Instruments Incorporated Product Folder Links: SN65LVDS1 SN65LVDS2 SN65LVDT2 |
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