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ST10F273Z4 Datasheet(PDF) 55 Page - STMicroelectronics |
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ST10F273Z4 Datasheet(HTML) 55 Page - STMicroelectronics |
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55 / 188 page  ST10F273Z4 Interrupt system 55/188 When different sources submit an interrupt request, the enable bits (Byte High of XIRxSEL register) define a mask which controls which sources will be associated with the unique available vector. If more than one source is enabled to issue the request, the service routine will have to take care to identify the real event to be serviced. This can easily be done by checking the flag bits (Byte Low of XIRxSEL register). Note that the flag bits can also provide information about events which are not currently serviced by the interrupt controller (since masked through the enable bits), allowing an effective software management also in absence of the possibility to serve the related interrupt request: a periodic polling of the flag bits may be implemented inside the user application. Figure 7. X-Interrupt basic structure The Table 31 summarizes the mapping of the different interrupt sources which shares the four X-interrupt vectors. Table 31. X-Interrupt detailed mapping XP0INT XP1INT XP2INT XP3INT CAN1 interrupt x x CAN2 interrupt x x I2C receive x x x I2C transmit x x x I2C error x SSC1 receive x x x SSC1 transmit x x x SSC1 error x ASC1 receive x x x ASC1 transmit x x x ASC1 transmit buffer x x x ASC1 error x XIRxSEL[7:0] (x = 0, 1, 2, 3) XIRxSEL[15:8] (x = 0, 1, 2, 3) XPxIC.XPxIR (x = 0, 1, 2, 3) 7 0 15 8 IT Source 7 IT Source 6 IT Source 5 IT Source 4 IT Source 3 IT Source 2 IT Source 1 IT Source 0 Enable[7:0] Flag[7:0] |
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