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R5F10WMGA Datasheet(PDF) 58 Page - Renesas Technology Corp

Part # R5F10WMGA
Description  Ultra-low power consumption technology
PDF  126 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

R5F10WMGA Datasheet(HTML) 58 Page - Renesas Technology Corp

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RL78/L13
2. ELECTRICAL SPECIFICATIONS (TA =
−40 to +85°C)
R01DS0168EJ0210 Rev.2.10
Aug 12, 2016
Page 58 of 123
(3) I2C fast mode plus
(TA =
−40 to +85°C, 1.6 V ≤ VDD ≤ 5.5 V, VSS = 0 V)
Parameter
Symbol
Conditions
HS (high-speed
main) Mode
LS (low-speed
main) Mode
LV (low-voltage
main) Mode
Unit
MIN.
MAX.
MIN.
MAX.
MIN.
MAX.
SCLA0 clock
frequency
fSCL
Fast mode
plus: fCLK
≥
10 MHz
2.7 V
≤ VDD ≤
5.5 V
0
1000
–
–
kHz
Setup time of restart
condition
tSU:STA
2.7 V
≤ VDD ≤ 5.5 V
0.26
–
–
μs
Hold timeNote 1
tHD:STA
2.7 V
≤ VDD ≤ 5.5 V
0.26
–
–
μs
Hold time when
SCLA0 =“L”
tLOW
2.7 V
≤ VDD ≤ 5.5 V
0.5
–
–
μs
Hold time when
SCLA0 =“H”
tHIGH
2.7 V
≤ VDD ≤ 5.5 V
0.26
–
–
μs
Data setup time
(reception)
tSU:DAT
2.7 V
≤ VDD ≤ 5.5 V
50
–
–
ns
Data hold time
(transmission
)Note 2
tHD:DAT
2.7 V
≤ VDD ≤ 5.5 V
0
0.45
–
–
μs
Setup time of stop
condition
tSU:STO
2.7 V
≤ VDD ≤ 5.5 V
0.26
–
–
μs
Bus-free time
tBUF
2.7 V
≤ VDD ≤ 5.5 V
0.5
–
–
μs
Notes 1.
The first clock pulse is generated after this period when the start/restart condition is detected.
2.
The maximum value (MAX.) of tHD:DAT is during normal transfer and a wait state is inserted in the ACK
(acknowledge) timing.
Caution
The values in the above table are applied even when bit 2 (PIOR2) in the peripheral I/O redirection
register (PIOR) is 1. At this time, the pin characteristics (IOH1, IOL1, VOH1, VOL1) must satisfy the values in
the redirect destination.
Remark
The maximum value of Cb (communication line capacitance) and the value of Rb (communication line pull-up
resistor) at that time in each mode are as follows.
Fast mode plus: Cb = 120 pF, Rb = 1.1 k
Ω
IICA serial transfer timing
tLOW
tR
tHIGH
tF
tHD:STA
tBUF
Stop
condition
Start
condition
Restart
condition
Stop
condition
tSU:DAT
tSU:STA
tSU:STO
tHD:STA
tHD:DAT
SCLA0
SDAA0



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