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R5F564MFDDFB Datasheet(PDF) 189 Page - Renesas Technology Corp |
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R5F564MFDDFB Datasheet(HTML) 189 Page - Renesas Technology Corp |
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189 / 228 page  R01DS0173EJ0110 Rev.1.10 Page 189 of 228 Oct 24, 2016 RX64M Group 5. Electrical Characteristics Note: tIICcyc: RIIC internal reference clock (IIC) cycle, tPBcyc: PCLKB cycle Note 1. The value within parentheses is applicable when the value of the ICMR3.NF[1:0] bits is 11b while the digital filter is enabled by the setting ICFER.NFE = 1. Note 2. Cb is the total capacitance of the bus lines. Table 5.37 RIIC Timing (2) Conditions: VCC = AVCC0 = AVCC1 = VCC_USB = VBATT = 2.7 to 3.6 V, 2.7 ≤ VREFH0 ≤ AVCC0, VCC_USBA = AVCC_USBA = 3.0 to 3.6 V, VSS = AVSS0 = AVSS1 = VREFL0 = VSS_USB = VSS1_USBA = VSS2_USBA = PVSS_USBA = AVSS_USBA = 0 V, PCLKA = 8 to 120 MHz, PCLKB = 8 to 60 MHz, Ta = Topr High-drive output is selected by the driving ability control register. Item Symbol Min.*1, *2 Max. Unit Test Conditions RIIC (Fast-mode+) ICFER.FMPE = 1 SCL input cycle time tSCL 6(12) × tIICcyc + 240 — ns Figure 5.56 SCL input high pulse width tSCLH 3(6) × tIICcyc + 120 — ns SCL input low pulse width tSCLL 3(6) × tIICcyc + 120 — ns SCL, SDA input rise time tSr — 120 ns SCL, SDA input fall time tSf — 120 ns SCL, SDA input spike pulse removal time tSP 01(4) × tIICcyc ns SDA input bus free time tBUF 3(6) × tIICcyc + 120 — ns Start condition input hold time tSTAH tIICcyc + 120 — ns Restart condition input setup time tSTAS 120 — ns Stop condition input setup time tSTOS 120 — ns Data input setup time tSDAS tIICcyc + 20 — ns Data input hold time tSDAH 0— ns SCL, SDA capacitive load Cb — 550 pF Simple IIC (Standard-mode) SDA input rise time tSr — 1000 ns SDA input fall time tSf — 300 ns SDA input spike pulse removal time tSP 04 × tPBcyc ns Data input setup time tSDAS 250 — ns Data input hold time tSDAH 0— ns SCL, SDA capacitive load Cb — 400 pF Simple IIC (Fast-mode) SCL, SDA input rise time tSr — 300 ns SCL, SDA input fall time tSf — 300 ns SCL, SDA input spike pulse removal time tSP 04 × tPBcyc ns Data input setup time tSDAS 100 — ns Data input hold time tSDAH 0— ns SCL, SDA capacitive load Cb — 400 pF |
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