PC87372 datasheet(84/144 Pages) NSC

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6.0 System Wake-Up Control (SWC) (Continued)

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Revision 1.2

6.3.8

Keyboard Data Shift Register (KDSR)

When keyboard wake-up detection is enabled, this register stores the keyboard data shifted in from the keyboard during

data transmission. It is reset to 00h.

Power Well: VSB3

Location:

Offset 06h

Type:

6.3.9

Mouse Data Shift Register (MDSR)

When mouse wake-up detection is enabled, this register stores the mouse data shifted in from the mouse during data

transmission. It is reset to 00h.

Power Well: VSB3

Location:

Offset 07h (offset in PC8741x = 17h)

Type:

6.3.10 PS2 Keyboard Key Data 0 to 7 Registers (PS2KEY0-7)

These eight registers (PS2KEY0-7) store the data bytes for Special Key Sequence or Password mode (KBDMODE = 00) or

for Power Management Keys mode (KBDMODE = 10) of the Keyboard/Mouse Wake-Up Detector.

In Special Key Sequence or in Password modes, the keyboard data is stored as follows:

PS2KEY0 register stores the data byte for the ﬁrst key in the sequence.

PS2KEY1 register stores the data byte for the second key in the sequence.

PS2KEY2-7 registers store data bytes for the third to eighth key in the sequence.

For keyboard data storage in Power Management Keys mode, see Section 6.3.6 on page 82.

When one of these registers is set to 00h, it indicates that the value of the corresponding data byte is ignored (i.e., it is not

compared with the keyboard data). These registers are reset to 00h.

Power Well: VSB3

Location: Offset 08h to 0Fh

Type: R/W, RO

Bit

43210

Name

Keyboard Data

Reset

00000

Bit

Description

7-0

Keyboard Data.

Bit

43210

Name

Reserved

Mouse Data

Reset

00000

Bit

Description

7-3

Reserved.

2-0

Mouse Data.

Bit

43210

Name

Data Byte of Key

Reset

00000

Bit

Description

7-0

Data Byte of Key.

PC87372 Datasheet(PDF) 84 Page - National Semiconductor (TI)

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