LPC47M182 datasheet(6/223 Pages) SMSC

6 / 223 page

Advanced I/O Controller with Motherboard GLUE Logic

Datasheet

Revision 1.8 SMSC/Non-SMSC Register Sets (02-24-05)

SMSC LPC47M182

DATASHEET

7.25

8042 Keyboard Controller Description .........................................................................................118

7.25.1

Keyboard Interface............................................................................................................................118

7.25.2

Keyboard Data Write.........................................................................................................................119

7.25.3

Keyboard Data Read.........................................................................................................................119

7.25.4

Keyboard Command Write................................................................................................................119

7.25.5

Keyboard Status Read ......................................................................................................................119

7.25.6

CPU-to-Host Communication............................................................................................................119

7.25.7

Host-to-CPU Communication............................................................................................................119

7.25.8

KIRQ .................................................................................................................................................120

7.25.9

MIRQ.................................................................................................................................................120

7.25.10

External Keyboard and Mouse Interface ...........................................................................................120

7.25.11

Keyboard Power Management..........................................................................................................120

7.25.12

Soft Power Down Mode ....................................................................................................................121

7.25.13

Hard Power Down Mode ...................................................................................................................121

7.25.14

Interrupts...........................................................................................................................................121

7.25.15

Memory Configurations .....................................................................................................................121

7.25.16

Register Definitions ...........................................................................................................................121

7.25.17

External Clock Signal ........................................................................................................................122

7.25.18

Default Reset Conditions ..................................................................................................................122

7.25.19

GATEA20 AND KEYBOARD RESET................................................................................................122

7.26

Port 92 Fast Gatea20 and Keyboard Reset.................................................................................122

7.26.1

Port 92 Register ................................................................................................................................122

7.26.2

Keyboard and Mouse PME Generation.............................................................................................126

7.27

General Purpose I/O ....................................................................................................................127

7.27.1

GPIO Pins .........................................................................................................................................127

7.27.2

Description ........................................................................................................................................128

7.27.3

GPIO Control.....................................................................................................................................129

7.27.4

GPIO Operation ................................................................................................................................130

7.27.5

GPIO PME Functionality ...................................................................................................................131

7.27.6

Either Edge Triggered Interrupts .......................................................................................................131

7.28

PME Support................................................................................................................................131

7.28.1

‘Wake on Specific Key’ Option ..........................................................................................................132

7.29

Fan Monitoring .............................................................................................................................134

7.29.1

Fan Tachometer Inputs .....................................................................................................................134

7.29.2

Detection of a Stalled Fan.................................................................................................................135

7.30

Hard Drive and Power LED Logic ................................................................................................135

7.30.1

Hard Drive Front Panel LED (Red)....................................................................................................135

7.30.2

Yellow and Green Power LED Pins...................................................................................................136

7.31

Power Generation (5V) ................................................................................................................138

7.31.1

Reference Pins..................................................................................................................................138

7.31.2

5V Main Reference Generation.........................................................................................................138

7.31.3

5V Standby Reference Generation ...................................................................................................139

7.31.4

Reference Timings ............................................................................................................................139

7.32

IDE Reset Output Pin...................................................................................................................139

7.33

PCI Reset Output Pins .................................................................................................................140

7.34

Voltage Translation Circuit...........................................................................................................140

7.35

SMBus Isolation Circuitry.............................................................................................................143

7.36

PS_ON Logic ...............................................................................................................................144

7.37

PWRGD_PLATFORM Logic ........................................................................................................145

7.37.1

Selecting the Delay ...........................................................................................................................146

7.38

SCK_BJT_GATE Output..............................................................................................................146

7.39

Backfeed Cut and Latched Backfeed Cut Circuitry......................................................................147

7.40

Resume Reset Logic....................................................................................................................152

7.41

CNR Logic....................................................................................................................................152

Chapter 8

Power Control Runtime Registers.................................................................................. 154

Chapter 9

GPIO Runtime Registers................................................................................................. 161

LPC47M182 Datasheet(PDF) 6 Page - SMSC Corporation

LPC47M182 Datasheet(HTML) 6 Page - SMSC Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL