LPC47M182 datasheet(7/223 Pages) SMSC

7 / 223 page

Advanced I/O Controller with Motherboard GLUE Logic

Datasheet

SMSC LPC47M182

Revision 1.8 SMSC/Non-SMSC Register Sets (02-24-05)

DATASHEET

Chapter 10

Runtime Register Block Runtime Registers ............................................................... 165

Chapter 11

Configuration ................................................................................................................ 167

11.1

System Elements .........................................................................................................................167

11.1.1

Primary Configuration Address Decoder...........................................................................................167

11.1.2

Entering the Configuration State .......................................................................................................167

11.1.3

Exiting the Configuration State..........................................................................................................167

11.1.4

CONFIGURATION SEQUENCE .......................................................................................................168

11.1.5

Enter Configuration Mode .................................................................................................................168

11.1.6

Configuration Mode...........................................................................................................................168

11.1.7

Exit Configuration Mode....................................................................................................................168

11.1.8

Programming Example......................................................................................................................169

11.2

Chip Level (Global) Control/Configuration Registers[0x00-0x2F]................................................174

11.3

Logical Device Configuration/Control Registers [0x30-0xFF]......................................................177

11.4

SMSC Defined Logical Device Configuration Registers ..............................................................183

Chapter 12

Electrical Characteristics ............................................................................................. 192

12.1

Maximum Guaranteed Ratings ....................................................................................................192

12.2

Operational DC Characteristics ...................................................................................................192

12.3

Standby Power Requirements .....................................................................................................197

12.4

Capacitance Values for Pins........................................................................................................197

Chapter 13

Timing Diagrams .......................................................................................................... 199

13.1

ECP PARALLEL PORT TIMING..................................................................................................208

13.1.1

Parallel Port FIFO (Mode 101) ..........................................................................................................208

13.1.2

ECP Parallel Port Timing ..................................................................................................................208

13.1.3

Forward-Idle......................................................................................................................................208

13.1.4

Forward Data Transfer Phase...........................................................................................................208

13.1.5

Reverse-Idle Phase...........................................................................................................................208

13.1.6

Reverse Data Transfer Phase...........................................................................................................208

13.1.7

Output Drivers ...................................................................................................................................209

Chapter 14

Package Outline ............................................................................................................ 220

Chapter 15

Board Test Mode........................................................................................................... 221

Chapter 16

Reference Documents ................................................................................................... 223

List of Figures

Figure 2.1 - LPC47M182 Pin Layout ............................................................................................................................12

Figure 4.1 – LPC47M182 Block Diagram.....................................................................................................................29

Figure 7.1 – NKBDRST Circuit...................................................................................................................................124

Figure 7.2 – Keyboard Latch......................................................................................................................................125

Figure 7.3 – Mouse Latch ..........................................................................................................................................125

Figure 7.4 – GPIO Function Illustration ......................................................................................................................130

Figure 7.5 – Fan Tachometer Input and Clock Source...............................................................................................134

Figure 7.6 – NHD_LED Circuit ...................................................................................................................................136

Figure 7.7 – Example Yellow and Green LED Circuit.................................................................................................137

Figure 7.8 – REF5V Circuit ........................................................................................................................................138

Figure 7.9 – REF5V_STBY ........................................................................................................................................139

Figure 7.10 – VGA DDC Voltage Translation Circuit..................................................................................................142

Figure 7.11 – SMBUS Isolation Circuit.......................................................................................................................144

Figure 7.12 – PRWGD_PLATFORM Generation .......................................................................................................146

Figure 7.13 - SCK_BJT_GATE Circuit .......................................................................................................................147

Figure 7.14– Backfeed Cut and Latched Backfeed Cut Circuit ..................................................................................148

Figure 7.15 – Latched Backfeed Cut Power Up Sequence ........................................................................................149

Figure 7.16 – Latched Backfeed Cut Sequence 1......................................................................................................149

Figure 7.17 – Latched Backfeed Cut Sequence 2......................................................................................................150

LPC47M182 Datasheet(PDF) 7 Page - SMSC Corporation

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