EM78P568

8-bit OTP Micro-controller

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* This specification are subject to be changed without notice.

33

01/31/2004

V4.7

DAST/P67

PORT67

DAO/P67

DATEN

MUX

2.5V

ref

VDD

REFSEL

REFEN

B2

B1

2R

2R

R

2R

2R

R

8-bit

DAC

input

data

buffer

(This circuit is from Comparator)

VRSEL

To ladder resistors

CMPEN

(This circuit is from CTCSS)

MUX

ASW3

VTX3

VRX3

To Sub-Audio LPF

MUX

DAC input

Fig.12 D/A converter (DAC)

Fig.13 DAC reference voltage control logic

Bit 7 (DAT/DAD) : Programmable D/A tone generation or D/A input data enable control

0

Enable D/A input data and disable D/A tone generation (also stop to D/A tone generation)

1

Enable Programmable D/A tone generation and disable D/A input data

IOCB (PORTB I/O control)

PAGE0 (PORTB I/O control register)

7

6

5

4

3

2

1

0

IOCB7

IOCB6

IOCB5

IOCB4

IOCB3

IOCB2

IOCB1

IOCB0

R/W-1

R/W-1

R/W-1

R/W-1

R/W-1

R/W-1

R/W-1

R/W-1

Bit 0 ~ Bit 7 (IOCB0 ~ IOCB7) : PORTB(0~7) I/O direction control register

0

put the relative I/O pin as output

1

put the relative I/O pin into high impedance

ASW3

DATEN

VREF

DAST/P67

REFSEL

REFEN

CMPEN

VRSEL