AD9545BCPZ datasheet(9/157 Pages) AD

Part #	AD9545BCPZ

Description	Quad Input, 10-Output, Dual DPLL/IEEE 1588 1 pps Synchronizer and Jitter Cleaner

PDF	157 Pages

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Manufacturer	AD [Analog Devices]

Direct Link	http://www.analog.com

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9 / 157 page

Data Sheet

AD9545

Rev. A | Page 9 of 157

Parameter

Min

Typ

Max

Unit

Test Conditions/Comments

Incremental Power Dissipation

Complete DPLL/APLL On/Off

200

Based on the Typical Configuration specification; the values in

this section indicate the change in power due to the indicated

operation relative to the Typical Configuration specification;

the blocks, when powered down, consist of one reference input,

one DPLL, one APLL, two channel dividers, and two output

drivers

Input Reference On/Off

Differential (AC-Coupled Mode)

fREF = 19.44 MHz (see Figure 29)

Differential (DC-Coupled Mode)

fREF = 19.44 MHz (see Figure 30)

Single-Ended

fREF = 19.44 MHz

Output Distribution Driver On/Off

At 156.25 MHz

15 mA Mode

12 mA Mode

7.5 mA Mode

Auxiliary DPLL On/Off

Auxiliary Numerically Controlled

Oscillator (NCO) to Mx Pin On/Off

Fundamental set to 50 kHz

Auxiliary Time-To-Digital Converters

(TDC) Input from Mx Pin On/Off

Input frequency = 10 MHz, auxiliary TDC rate = 200 kHz

AD9545BCPZ Datasheet(PDF) 9 Page - Analog Devices