LTC6952 datasheet(72/80 Pages) AD

72 / 80 page

LTC6952

6952f

For more information www.analog.com

Preliminary Technical Data

Advance Product Information Subject to Change

Rev PrA

APPLICATIONS INFORMATION

The purpose of R1 and R2 in Figure 50 is to force an offset

at the SYSREF inputs equivalent to a CML logic “0” when

the SYSREF output is not active. The resistors’ values are

determined by the supply voltage (VDD) and the receiver

device’s input common mode voltage (VCM)anddifferential

input resistance (RDIFF). Use Equation 26 to calculate R1

and Equation 27 to calculate R2.

R1 = RDIFF • [VCM/0.44 – 0.5]

(26)

R2 = RDIFF • [(VDD – VCM)/0.44 – 0.5]

(27)

For receiver devices with internal 100Ω terminations, the

values of R1 and R2 can be very small and will affect the

overall termination impedance, leading to undesirable

impedance mismatch. For this reason, the use of pulsed

SYSREFs (MODEx = 3) AC coupled into receiver parts with

internal 100Ω terminations is not recommended.

Settling time for pulsed SYSREF connections (Figure 50)

is approximately determined by the AC coupling capaci-

tors (CAC), both the differential and common mode input

resistance of the receiver device (RDIFF and RCM), and

resistors R1 and R2:

tsettleP ≅ 10 • [RDEV • ROS/(RDEV + ROS)] • CAC

where:

RDEV = 2RCM + RDIFF/2

ROS = minimum(R1, R2)

For pulsed mode SYSREFs to work correctly with AC

coupling, tsettleP must be greater than 1000/fSYSREF, where

fSYSREF is the frequency of the SYSREF pulses.

Use the following procedure to achieve correct JESD204B

SYSREF behavior for AC coupled pulsed SYSREFs.

These methods assume that the SYSREF outputs have

already been synchronized and that the SYSREF output

drivers have been disabled for power savings (PDx = 2).

Pulsed SYSREFs (MODEx = 3)

1. Enable the LTC6952 SYSREF output drivers by setting

PDx = 0 and set SRQMD = 1.

2. Wait for a settling period of at least tsettleP.

3. Set the receiver device to accept SYSREFs.

Figure 51. Example of Spurious Measurement Technique

100Ω

50Ω

OUTx+

OUTx–

6952 F51

LTC6952

OUTx+

OUTx–

LTC6955

IN+

IN–

SPECTRUM

ANALYZER

4. Set SSRQ or the EZS_SRQ inputs to “1” for at least

1ms, then set back to “0”.

5. Set the receiver device to stop accepting SYSREFs.

6. Disable the LTC6952 SYSREF output drivers by setting

PDx = 2 and set SRQMD = 0

MEASURING DIFFERENTIAL SPURIOUS SIGNALS

USING SINGLE-ENDED TEST EQUIPMENT

Using a spectrum analyzer to measure spurious signals

on the single-ended output of a clock generation chip will

give pessimistic results, particularly for outputs that ap-

proximate square waves. There are two reasons for this.

First, since the spurious energy is often an AC signal

superimposed on the power supply, a differential output

will reject the spurs to within the matching of the posi-

tive and negative outputs. Observing only one side of the

differential output will provide no rejection.

Second, and most importantly, the spectrum analyzer will

display all of the energy at its input, including amplitude

modulation that occurs at the top and bottom pedestal

voltage of the square wave. However, only amplitude

modulation near a zero crossing will affect the clock.

The best way to remove this measurement error is to

drive the clock generator output differentially into a limit-

ing buffer on a separate clean power supply. One of the

differential outputs of the limiting buffer can then connect

to a spectrum analyzer to correctly measure the spurious

energy. An example of this technique using the LTC6952

as the clock generator and an LTC6955 as the limiter is

shown in Figure 51.

LTC6952 Datasheet(PDF) 72 Page - Analog Devices

LTC6952 Datasheet(HTML) 72 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80

Datasheet Download

Link URL