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56F8014 Datasheet(PDF) 25 Page - Freescale Semiconductor, Inc |
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56F8014 Datasheet(HTML) 25 Page - Freescale Semiconductor, Inc |
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25 / 124 page ![]() Operating Modes 56F8014 Technical Data, Rev. 3 Freescale Semiconductor 25 Preliminary The 56F8000 family parts’ on-chip clock synthesis module has the following registers: • Control Register (OCCS_CR) • Divide-by Register (OCCS_DB) • Status Register (OCCS_SR) • Shutdown Register (OCCS_SHUTDN) • Oscillator Control Register (OCCS_OCTRL) For more information on these registers, please refer to the 56F8000 Peripheral Reference Manual. 3.3.1 External Clock Source The recommended method of connecting an external clock is illustrated in Figure 3-1. The external clock source is connected to GPIOB6 / RXD. Figure 3-1 Connecting an External Clock Signal using GPIOB6 / RXD 56F8014 GPIOB6 / RXD External Clock |
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