56F8014 datasheet(42/124 Pages) FREESCALE

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56F8014 Technical Data, Rev. 3

Freescale Semiconductor

Preliminary

Part 5 Interrupt Controller (ITCN)

5.1 Introduction

The Interrupt Controller (ITCN) module is used to arbitrate between various interrupt requests (IRQs), to

signal to the 56800E core when an interrupt of sufficient priority exists, and to what address to jump in

order to service this interrupt.

5.2 Features

The ITCN module design includes these distinctive features:

•

Programmable priority levels for each IRQ

•

Two programmable Fast Interrupts

•

Notification to SIM module to restart clocks out of Wait and Stop modes

•

Ability to drive initial address on the address bus after reset

For further information, see Table 4-2, Interrupt Vector Table Contents.

5.3 Functional Description

The Interrupt Controller is a slave on the IPBus. It contains registers that allow each of the 46 interrupt

sources to be set to one of four priority levels (excluding certain interrupts that are of fixed priority). Next,

all of the interrupt requests of a given level are priority encoded to determine the lowest numerical value

of the active interrupt requests for that level. Within a given priority level, number 0 is the highest priority

and number 45 is the lowest.

5.3.1

Normal Interrupt Handling

Once the INTC has determined that an interrupt is to be serviced and which interrupt has the highest

priority, an interrupt vector address is generated. Normal interrupt handling concatenates the Vector Base

Address (VBA) and the vector number to determine the vector address, generating an offset into the vector

table for each interrupt.

5.3.2

Interrupt Nesting

Interrupt exceptions may be nested to allow an IRQ of higher priority than the current exception to be

serviced. The following table defines the nesting requirements for each priority level.

56F8014 Datasheet(PDF) 42 Page - Freescale Semiconductor, Inc