MSM66577 datasheet(23/34 Pages) OKI

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PEDL66577-01

1Semiconductor

MSM66577 Family

23/34

External data memory control

MSM66577L (V

DD = 2.4 to 3.6 V, Ta = –30 to +70°C)

MSM66Q577LY (V

DD = 3.0 to 3.6 V, Ta = –30 to +70°C)

Parameter

Symbol

Condition

Min.

Max.

Unit

Cycle time

cyc

OSC = 14 MHz

71.4

—

Clock pulse width (HIGH level)

tφWH

—

Clock pulse width (LOW level)

tφWL

—

RD pulse width

2 t

φ – 40

—

WR pulse width

2 t

φ – 40

—

RD pulse delay time

—95

WR pulse delay time

—95

Address setup time

φ – 45

—

Address hold time

φ – 6

—

Read data setup time

—

Read data hold time

0—

Read data access time

ACC

—3t

φ –120

Write data setup time

φ – 55

—

Write data hold time

L = 50 pF

φ – 6

—

Note: t

φ = t

cyc/2

DIN0 to 7

RAP0 to 19

cyc

tφ

CPUCLK

A0 to A19

D0 to D7

DOUT0 to 7

RAP0 to 19

Bus timing during no wait cycle time

A0 to A19

D0 to D7

tφ

ACC

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