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UPD17P133CS Datasheet(PDF) 67 Page - NEC |
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UPD17P133CS Datasheet(HTML) 67 Page - NEC |
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67 / 289 page ![]() CHAPTER 7 SYSTEM REGISTER (SYSREG) 52 7.5.4 MPE=1 and IXE=0 (Diagonal Indirect Data Transfer) As shown in Figure 7-8, the indirect data transfer bank and row address specified by @r become the data memory row address pointer value only when general register indirect data transfer instructions (MOV @r, m and MOV m, @r) are used. Example 1. When the general register is in row address 0 R005 MEM 0.05H M034 MEM 0.34H MOV MPL, #0110B ; MP ← 6 MOV R005, #8 ; R005 ← 8 MOV MPH, #1000B ; MPE ← 1 MOV @R005, M034 ; Indirect transfer of data in the register As shown in Figure 7-10, when the above instructions are executed, the contents of data memory address M034 is transferred to data memory location 68H. When the MOV @r, m instruction is executed when MPE=1, the contents of the data memory address specified by m is transferred to the column address pointed to by the row address @r being pointed to by the memory pointer. In this case, the indirect address specified by @r becomes the value used for the bank and row address data memory pointer (above example uses row address 6). The column address is the value in the general register address specified by r (above example uses column address 8). Therefore the address in the above example is 68H. This example is different from Example 2 in 7.5.3 when MPE=0 for the following reasons: In this example, the data memory row address pointer is used to point to the indirect address bank and row address specified by @r. (In Example 2 in 7.5.3 the indirect address bank and row address are the same as m.) By setting MPE=1, diagonal indirect data transfer can be performed using the general register. |
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