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UPD17P133CS Datasheet(PDF) 74 Page - NEC |
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UPD17P133CS Datasheet(HTML) 74 Page - NEC |
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74 / 289 page ![]() CHAPTER 7 SYSTEM REGISTER (SYSREG) 59 7.6 GENERAL REGISTER POINTER (RP) 7.6.1 General Register Pointer Configuration Figure 7-14 shows the configuration of the general register pointer. Figure 7-14. General Register Pointer Configuration As shows in Figure 7-14, the general register pointer consists of seven bits; four bits in system register address 7DH (RPH) and the three high-order bits of system register address 7EH (RPL). However, because the four bits of address 7DH are always set to 0, the register effectively consists of the three high-order bits of address 7EH. All register bits are cleared to 0 at reset. 7DH Address Name Bit Symbol Data Initial value when reset b3 b2 b1 b0 0000 0 (RP) RPH 7EH General register pointer (RP) b3 b2 b1 b0 B C D 0 RPL Flag |
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