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UPD17P133CS Datasheet(PDF) 94 Page - NEC |
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UPD17P133CS Datasheet(HTML) 94 Page - NEC |
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94 / 289 page ![]() CHAPTER 10 DATA BUFFER (DBF) The data buffer consists of four nibbles allocated in addresses 0CH to 0FH in BANK0. The data buffer is used as a data storage area when data is transferred to/from the CPU peripheral circuit (address register, serial interface, and timer) by the GET and PUT instructions. By using the MOVT DBF, and @AR instructions, fixed data in program memory can be read into the data buffer. 10.1 DATA BUFFER CONFIGURATION Figure 10-1 shows the allocation of the data buffer in data memory. As shown in Figure 10-1, the data buffer is allocated in address locations 0CH to 0FH in BANK0 and consists of a total of 16 bits (4 × 4 bits). Figure 10-1. Allocation of the Data Buffer 0 1 2 3 4 5 6 7 0 BANK0 Column address 123456789 A B C D E F Data memory Data buffer (DBF) System register (SYSREG) Figure 10-2 shows the configuration of the data buffer. As shown in Figure 10-2, the data buffer is made up of sixteen bits with its least significant bit in bit 0 of address 0FH and its most significant bit in bit 3 of address 0CH. 79 |
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