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TPS65982ABZBHR Datasheet(PDF) 93 Page - Texas Instruments |
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TPS65982ABZBHR Datasheet(HTML) 93 Page - Texas Instruments |
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93 / 121 page ![]() PP_5V0 VBUS Fast current limit PP_5V0 Gate Control and Current Limit PP_HV Fast current limit PP_HV Gate Control and Current Limit HV Gate Control and Sense PP_EXT AGND 93 TPS65982 www.ti.com SLVSD02D – MARCH 2015 – REVISED JUNE 2019 Product Folder Links: TPS65982 Submit Documentation Feedback Copyright © 2015–2019, Texas Instruments Incorporated Figure 86. Schottky on VBUS for Current Surge Protection 12 Layout 12.1 Layout Guidelines Proper routing and placement will maintain signal integrity for high-speed signals and improve the thermal dissipation from the TPS65982 power path. The combination of power and high-speed data signals are easily routed if the following guidelines are followed. It is a best practice to consult with a printed circuit board (PCB) manufacturer to verify manufacturing capabilities. 12.1.1 TPS65982 Recommended Footprints 12.1.1.1 Standard TPS65982 Footprint (Circular Pads) Figure 87 shows the TPS65982 footprint using a 0.25mm pad diameter. This footprint is applicable to boards that will be using an HDI PCB process that uses smaller vias to fan-out into the inner layers of the PCB. This footprint requires via fill and tenting and is recommended for size-constrained applications. The circular footprint allows for easy fan-out into other layers of the PCB and better thermal dissipation into the GND planes. Figure 88 shows the recommended via sizing for use under the balls. The size is 5mil hole and 10mil diameter. This via size will allow for approximately 1.5A current rating at 3 mΩ of DC resistance with 1.6nH of inductance. It is recommended to verify these numbers with board manufacturing processes used in fabrication of the PCB. This footprint is available for download on the TPS65982 product folder on the TPS65982 product folder. |
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