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ADV7183ABST Datasheet(PDF) 97 Page - Analog Devices |
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ADV7183ABST Datasheet(HTML) 97 Page - Analog Devices |
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97 / 104 page  ADV7183A Rev. A | Page 97 of 104 APPENDIX A I2C PROGRAMMING EXAMPLES Mode 1 CVBS Input (Composite Video on AIN5) All standards are supported through autodetect, 8-bit, 4:2:2, ITU-R BT.656 output on P15–P8. Table 208. Mode 1 CVBS Input Register Address Register Value Notes 0x00 0x04 CVBS input on AIN5. 0x01 0x88 Turn off HSYNC processor (SECAM only13). 0x17 0x41 Set CSFM to SH1. 0x2B 0xE2 AGC tweak 0x3A 0x16 Power down ADC 1 and ADC 2. 0x51 0x24 Turn off FSC detect for IN LOCK status. 0xD2 0x01 AGC tweak. 0xD3 0x01 AGC tweak. 0xDB 0x9B AGC tweak. 0x0E 0x85 ADI recommended programming sequence. This sequence must be followed exactly when setting up the decoder. 0x89 0x0D Recommended setting. 0x8D 0x9B Recommended setting. 0x8F 0x48 Recommended setting. 0xB5 0x8B Recommended setting. 0xD4 0xFB Recommended setting. 0xD6 0x6D Recommended setting. 0xE2 0xAF Recommended setting. 0xE3 0x00 Recommended setting. 0xE4 0xB5 Recommended setting. 0xE8 0xF3 Recommended setting. 0x0E 0x05 Recommended setting. 13 For all SECAM modes of operation, HSYNC PROCESSOR must be turned off. |
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