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68HC705JB3 Datasheet(PDF) 48 Page - Freescale Semiconductor, Inc |
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68HC705JB3 Datasheet(HTML) 48 Page - Freescale Semiconductor, Inc |
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48 / 134 page ![]() GENERAL RELEASE SPECIFICATION November 5, 1998 MOTOROLA INPUT/OUTPUT PORTS MC68HC05JB3 7-2 REV 1 7.1.1 Port-A Data Register 7.1.2 Port-A Data Direction Register DDRAx — PAx Data Direction 1 = Port pin set as output. 0 = Port pin set as input. 7.1.3 Port-A Pull-down/up Register With the pull-up/down mask option selected, each pin in Port-A has an internal pull-down resistor which can be enabled by writing a ‘0’ to the corresponding bit in the Port-A pull-down/up control register (PDURA) at location $0010. PDRAx — PAx Pin Pull-down enable 1 = Internal pull-down disabled. 0 = Internal pull-down enabled. 7.1.4 PA0-PA3 Interrupts A mask option selects the capability for PA0-PA3 to be used as external IRQ inter- rupt inputs. These four I/O pins also have schmitt trigger input circuits. See INTERRUPTS section for detail. PDRAx DDRAx Pin Configuration 0 0 Input with pull-down 0 1 Output Push/Pull 1 0 Input 1 1 Output Push/Pull BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 PORTA R PA7 PA6 PA5 PA4 PA3 PA2 PA1 PA0 $0000 W reset: 00000000 BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 DDRA R DDRA7 DDRA6 DDRA5 DDRA4 DDRA3 DDRA2 DDRA1 DDRA0 $0004 W reset: 00000000 BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 PDURA R $0010 W PDRA7 PDRA7 PDRA7 PDRA7 PDRA7 PDRA7 PDRA7 PDRA7 reset: 00000000 Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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