RA4W1 datasheet(67/105 Pages) RENESAS

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R01DS0359EJ0100 Rev.1.00

Page 67 of 105

Mar 31, 2020

RA4W1 Datasheet

2. Electrical Characteristics

2.3.10

IIC Timing

Note:

tIICcyc: IIC internal reference clock (IICφ) cycle, tPcyc: PCLKB cycle

Note 1.

The value in parentheses apply when ICMR3.NF[1:0] is set to 11b while the digital filter is enabled with ICFER.NFE set to 1.

Table 2.38

IIC timing

Conditions: VCC = 2.7 to 3.6 V

Parameter

Symbol Min*1

Max

Unit

Test

conditions

IIC

(standard mode,

SMBus)

SCL input cycle time

tSCL

6 (12) × tIICcyc + 1300

Figure 2.57

SCL input high pulse width

tSCLH

3 (6) × tIICcyc + 300

SCL input low pulse width

tSCLL

3 (6) × tIICcyc + 300

SCL, SDA input rise time

tSr

1000

SCL, SDA input fall time

tSf

300

SCL, SDA input spike pulse removal

time

tSP

1 (4) × tIICcyc

SDA input bus free time

(When wakeup function is disabled)

tBUF

3 (6) × tIICcyc + 300

SDA input bus free time

(When wakeup function is enabled)

tBUF

3 (6) × tIICcyc + 4 × tPcyc

+ 300

-ns

START condition input hold time

(When wakeup function is disabled)

tSTAH

tIICcyc + 300

START condition input hold time

(When wakeup function is enabled)

tSTAH

1 (5) × tIICcyc + tPcyc +

300

-ns

Repeated START condition input

setup time

tSTAS

1000

STOP condition input setup time

tSTOS

1000

Data input setup time

tSDAS

tIICcyc + 50

Data input hold time

tSDAH

SCL, SDA capacitive load

400

IIC

(Fast mode)

SCL input cycle time

tSCL

6 (12) × tIICcyc + 600

Figure 2.57

For all ports,

use

PmnPFS.DS

CR of middle

drive.

SCL input high pulse width

tSCLH

3 (6) × tIICcyc + 300

SCL input low pulse width

tSCLL

3 (6) × tIICcyc + 300

SCL, SDA input rise time

tSr

300

SCL, SDA input fall time

tSf

300

SCL, SDA input spike pulse removal

time

tSP

1 (4) × tIICcyc

SDA input bus free time

(When wakeup function is disabled)

tBUF

3 (6) × tIICcyc + 300

SDA input bus free time

(When wakeup function is enabled)

tBUF

3 (6) × tIICcyc + 4 × tPcyc

+ 300

-ns

START condition input hold time

(When wakeup function is disabled)

tSTAH

tIICcyc + 300

START condition input hold time

(When wakeup function is enabled)

tSTAH

1(5) × tIICcyc + tPcyc +

300

-ns

Repeated START condition input

setup time

tSTAS

300

STOP condition input setup time

tSTOS

300

Data input setup time

tSDAS

tIICcyc + 50

Data input hold time

tSDAH

SCL, SDA capacitive load

400

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