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CS47L15 Datasheet(PDF) 34 Page - Cirrus Logic |
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CS47L15 Datasheet(HTML) 34 Page - Cirrus Logic |
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34 / 279 page ![]() 34 DS1137F2 CS47L15 4.2 Input Signal Path Note that the CS47L15 provides an integrated pull-down resistor on the DMICDAT pin. This provides a flexible capability for interfacing with other devices. Figure 4-11. DMIC Input Two DMIC channels are interleaved on DMICDAT. The DMIC interface timing is shown in Fig. 4-12. Each microphone must tristate its data output when the other microphone is transmitting. See Table 3-14 for a detailed timing specification of the DMIC interface. Figure 4-12. DMIC Interface Timing 4.2.4.2 IN2 Digital Input (SPKRXDAT) The IN2 digital input path forms part of a bidirectional interface for external speaker drivers. If the IN2 path is configured for digital input, two channels of audio data are multiplexed on the SPKRXDAT pin. A timing reference signal is provided on the SPKCLK pin, which is common to the input (SPKRXDAT) and output (SPKTXDAT) paths of the digital speaker (PDM) interface. The SPKCLK frequency is controlled using the OUT5_OSR field, as described in Table 4-55. The input signal timing is controlled by the IN2_OSR field—this field must be configured for the same frequency as the OUT5_OSR field. Digital Mic MICVDD or MICBIAS1x AGND Digital Mic VDD CLK DATA VDD CLK DATA CHAN CHAN VDD DMICDAT DMICCLK Digital Microphone Interface The DMIC inputs are referenced to MICVDD or MICBIAS1. The supply for each digital microphone should provide the same voltage as the applicable reference. DMICCLK pin DMICDAT pin (Left and right channels interleaved) 1 2 1 2 1 2 Left mic output 1 1 1 Right mic output 2 2 2 Hi-Z |
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