RX113 datasheet(77/131 Pages) RENESAS

77 / 131 page

R01DS0216EJ0120 Rev.1.20

Page 77 of 131

Sep 07, 2020

RX113 Group

5. Electrical Characteristics

Note 1. Time until the clock can be used after the main clock oscillator stop bit (MOSCCR.MOSTP) is set to 0 (operating) when the

external clock is stable.

Note 2. Reference values when an 8-MHz resonator is used.

When specifying the main clock oscillator stabilization time, set the MOSCWTCR register with a stabilization time value that is

equal to or greater than the resonator-manufacturer-recommended value.

After changing the setting of the MOSCCR.MOSTP bit so that the main clock oscillator operates, read the OSCOVFSR.MOOVF

flag to confirm that is has become 1, and then start using the main clock.

Note 3. The VCC range should be 2.4 to 3.6 V when the PLL is used.

Note 4. After changing the setting of the SOSCCR.SOSTP bit or RCR3.RTCEN bit so that the sub-clock oscillator operates, only start

using the sub-clock after the sub-clock oscillation stabilization wait time that is equal to or greater than the

oscillator-manufacturer-recommended value has elapsed.

Reference value when a 32.768-kHz resonator is used.

Note 5. The VCC range should be 3.0 to 3.6 V when the USBPLL is used.

Note 6. The input frequency can be set to 6 or 8 MHz only and the oscillation frequency can be set to 48 MHz only.

Note 7. Only 32.768 kHz can be used.

Table 5.22

Clock Timing

Conditions: 1.8 V

≤ VCC = VCC_USB ≤ 3.6 V, 1.8 V ≤ AVCC0 ≤ 3.6 V, VSS = AVSS0 = VSS_USB = 0 V, T

a = –40 to +105°C

Item

Symbol

Min.

Typ.

Max.

Unit

Test Conditions

XTAL external clock input cycle time

tXcyc

—

Figure 5.18

XTAL external clock input high pulse width

tXH

—

XTAL external clock input low pulse width

tXL

—

XTAL external clock rising time

tXr

——

XTAL external clock falling time

tXf

——

XTAL external clock input wait time*1

tEXWT

0.5

—

µs

Main clock oscillator oscillation

frequency

2.4

≤ VCC ≤ 3.6

fMAIN

1—

MHz

1.8

≤ VCC < 2.4

—

Main clock oscillation stabilization time (crystal)*2

tMAINOSC

—

Figure 5.19

Main clock oscillation stabilization time (ceramic

resonator)*2

tMAINOSC

—50

—

µs

LOCO clock oscillation frequency

fLOCO

3.44

4.0

4.56

MHz

LOCO clock oscillation stabilization time

tLOCO

—

0.5

µs

Figure 5.20

IWDT-dedicated clock oscillation frequency

fILOCO

12.75

17.25

kHz

IWDT-dedicated clock oscillation stabilization time

tILOCO

—

µs

Figure 5.21

HOCO clock oscillation frequency

fHOCO

31.52

32.48

MHz

Ta = –40 to 85°C

31.68

32.32

Ta = –20 to 85°C

31.36

32.64

Ta = –40 to 105°C

HOCO clock oscillation stabilization time

tHOCO

—

µs

Figure 5.23

PLL input frequency*3

fPLLIN

4—

MHz

PLL circuit oscillation frequency*3

fPLL

—

MHz

PLL clock oscillation stabilization time

tPLL

—

µs

Figure 5.24

PLL free-running oscillation frequency

fPLLFR

—8—

MHz

USBPLL input frequency*5

fPLLIN

—6, 8*6

—MHz

USBPLL circuit oscillation frequency*5

fPLL

—48*6

—MHz

USBPLL clock oscillation stabilization time

tPLL

—

µs

Figure 5.24

Sub-clock oscillator oscillation frequency*7

fSUB

—

32.768

—

kHz

Sub-clock oscillation stabilization time*4

tSUBOSC

—

0.5

—

Figure 5.25

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