UPD17P136ACT datasheet(16/292 Pages) NEC

16 / 292 page

- ix -

14-1

Interrupt Control Register ...................................................................................................................... 152

14-2

Interrupt Processing Procedure ............................................................................................................ 158

14-3

Return from Interrupt Processing .......................................................................................................... 159

14-4

Interrupt Accepting Timing (When INTE = 1, IP

××× = 1) ..................................................................... 160

14-5

Example of Multi-interrupt ..................................................................................................................... 163

15-1

Block Diagram for the AC Zero Cross Detector ................................................................................... 167

15-2

Zero Cross Detection Signal ................................................................................................................. 168

16-1

Releasing HALT Mode ........................................................................................................................... 171

16-2

Releasing STOP Mode .......................................................................................................................... 175

17-1

Reset Block Configuration ..................................................................................................................... 181

17-2

Reset Operation ..................................................................................................................................... 181

17-3

Example of the Power-On Reset Operation ......................................................................................... 184

17-4

Example of the Power-Down Reset Operation ..................................................................................... 186

17-5

Example of Reset Operation during the Period from Power-Down Reset to Power Recovery ......... 187

18-1

Procedure of Program Memory Writing ................................................................................................ 191

18-2

Procedure of Program Memory Reading .............................................................................................. 192

D-1

External Circuit of System Clock Oscillation Circuit ............................................................................. 267

D-2

Example of Incorrect Oscillation Circuits .............................................................................................. 268

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