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UPD17P136ACT Datasheet(PDF) 161 Page - NEC |
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UPD17P136ACT Datasheet(HTML) 161 Page - NEC |
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161 / 292 page  CHAPTER 13 PERIPHERAL HARDWARE 142 Figure 13-22. Block Diagram of the Serial Interface Note The output latch of the shift register is shared with P0D1. If an output instruction is executed to P0D1, therefore, the status of the output latch of the shift register is accordingly changed. Shift register (SIOSFR) P0D2/SI P0D1/SO P0D0/SCK SIOEN P0DBIO0 P0DBIO1 Q S R Output latch SIOTS SIOHIZ SIOCK1 SIOCK0 Single shot Clear Serial clock counter IRQSIO clear signal IRQSIO set signal P0D0 output latch Selector Note Clear Carry MSB LSB |
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