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AM6421 Datasheet(PDF) 146 Page - Texas Instruments |
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AM6421 Datasheet(HTML) 146 Page - Texas Instruments |
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146 / 237 page ![]() 7.10.5.8 GPMC For more details about features and additional description information on the device General-Purpose Memory Controller, see the corresponding sections within Section 6.3, Signal Descriptions and Section 8, Detailed Description. 7.10.5.8.1 GPMC and NOR Flash — Synchronous Mode Section 7.10.5.8.1.1 and Section 7.10.5.8.1.2 assume testing over the recommended operating conditions and electrical characteristic conditions below (see Figure 7-37 through Figure 7-41). 7.10.5.8.1.1 GPMC and NOR Flash Timing Requirements — Synchronous Mode NO. PARAMETER DESCRIPTION MODE (2) MIN MAX MIN MAX UNIT 100 MHz 133 MHz F12 tsu(dV-clkH) Setup time, input data GPMC_AD[15:0] valid before output clock GPMC_CLK high div_by_1_mode; GPMC_FCLK_MUX; TIMEPARAGRANULARITY_X1 1.81 1.11 ns not_div_by_1_mode; GPMC_FCLK_MUX; TIMEPARAGRANULARITY_X1 1.06 3.50 ns F13 th(clkH-dV) Hold time, input data GPMC_AD[15:0] valid after output clock GPMC_CLK high div_by_1_mode; GPMC_FCLK_MUX; TIMEPARAGRANULARITY_X1 1.78 2.28 ns not_div_by_1_mode; GPMC_FCLK_MUX; TIMEPARAGRANULARITY_X1 1.78 1.78 ns F21 tsu(waitV-clkH) Setup time, input wait GPMC_WAIT[j] valid before output clock GPMC_CLK high (1) div_by_1_mode; GPMC_FCLK_MUX; TIMEPARAGRANULARITY_X1 1.81 1.11 ns not_div_by_1_mode; GPMC_FCLK_MUX; TIMEPARAGRANULARITY_X1 1.06 3.50 ns F22 th(clkH-waitV) Hold time, input wait GPMC_WAIT[j] valid after output clock GPMC_CLK high (1) div_by_1_mode; GPMC_FCLK_MUX; TIMEPARAGRANULARITY_X1 1.78 2.28 ns not_div_by_1_mode; GPMC_FCLK_MUX; TIMEPARAGRANULARITY_X1 1.78 1.78 ns (1) In GPMC_WAIT[j], j is equal to 0 or 1. (2) For div_by_1_mode: • GPMC_CONFIG1_i Register: GPMCFCLKDIVIDER = 0h: – GPMC_CLK frequency = GPMC_FCLK frequency For not_div_by_1_mode: • GPMC_CONFIG1_i Register: GPMCFCLKDIVIDER = 1h to 3h: – GPMC_CLK frequency = GPMC_FCLK frequency / (2 to 4) For GPMC_FCLK_MUX: • CTRLMMR_GPMC_CLKSEL[1-0] CLK_SEL = 01 = PER1_PLL_CLKOUT / 3 = 300 / 3 = 100MHz For TIMEPARAGRANULARITY_X1: • GPMC_CONFIG1_i Register: TIMEPARAGRANULARITY = 0h = x1 latencies (affecting RD/WRCYCLETIME, RD/ WRACCESSTIME, PAGEBURSTACCESSTIME, CSONTIME, CSRD/WROFFTIME, ADVONTIME, ADVRD/WROFFTIME, OEONTIME, OEOFFTIME, WEONTIME, WEOFFTIME, CYCLE2CYCLEDELAY, BUSTURNAROUND, TIMEOUTSTARTVALUE, WRDATAONADMUXBUS) AM6442, AM6441, AM6421 AM6412, AM6411 SPRSP56 – JANUARY 2021 www.ti.com 146 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: AM6442 AM6441 AM6421 AM6412 AM6411 |
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