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AM6421 Datasheet(PDF) 180 Page - Texas Instruments |
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AM6421 Datasheet(HTML) 180 Page - Texas Instruments |
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180 / 237 page ![]() Table 7-67. Switching Characteristics for MMC1 – Default Speed Mode (continued) see Figure 7-65 NO. PARAMETER DESCRIPTION MIN MAX UNIT DSSD4 td(clkL-dV) Delay time, MMC1_CLK falling edge to MMC1_DAT[3:0] transition - 14.1 14.1 ns DSSD2 DSSD1 DSSD0 DSSD3 DSSD4 MMCi_CLK MMCi_CMD MMCi_DAT[j:0] MMC1_02 Figure 7-65. MMC1 – Default Speed – Transmit Mode 7.10.5.12.2.2 High Speed Mode Table 7-68, Figure 7-66, Table 7-69, and Figure 7-67 present timing requirements and switching characteristics for MMC1 – High Speed Mode. Table 7-68. Timing Requirements for MMC1 – High Speed Mode see Figure 7-66 NO. PARAMETER DESCRIPTION MIN MAX UNIT HSSD3 tsu(cmdV-clkH) Setup time, MMC1_CMD valid before MMC1_CLK rising edge 2.55 ns HSSD4 th(clkH-cmdV) Hold time, MMC1_CMD valid after MMC1_CLK rising edge 2.67 ns HSSD7 tsu(dV-clkH) Setup time, MMC1_DAT[3:0] valid before MMC1_CLK rising edge 2.55 ns HSSD8 th(clkH-dV) Hold time, MMC1_DAT[3:0] valid after MMC1_CLK rising edge 2.67 ns MMCi_CLK MMCi_CMD MMCi_DAT[j:0] HSSD1 HSSD2L HSSD2H HSSD3 HSSD4 HSSD7 HSSD8 MMC1_03 Figure 7-66. MMC1 – High Speed – Receive Mode Table 7-69. Switching Characteristics for MMC1 – High Speed Mode see Figure 7-67 NO. PARAMETER DESCRIPTION MIN MAX UNIT fop(clk) Operating frequency, MMC1_CLK 50 MHz HSSD1 tc(clk) Cycle time. MMC1_CLK 20 ns HSSD2H tw(clkH) Pulse duration, MMC1_CLK high 9.2 ns HSSD2L tw(clkL) Pulse duration, MMC1_CLK low 9.2 ns HSSD5 td(clkL-cmdV) Delay time, MMC1_CLK falling edge to MMC1_CMD transition -7.35 3.35 ns AM6442, AM6441, AM6421 AM6412, AM6411 SPRSP56 – JANUARY 2021 www.ti.com 180 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: AM6442 AM6441 AM6421 AM6412 AM6411 |
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