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AM6421 Datasheet(PDF) 197 Page - Texas Instruments

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Part # AM6421
Description  AM64x Sitara Processors
PDF  237 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

AM6421 Datasheet(HTML) 197 Page - Texas Instruments

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EDC_LATCH_INx
PRLA2
PRU_IEP_TIMING_02
PRLA1
Figure 7-96. PRU_ICSSG IEP LATCH_INx Timing Requirements
7.10.5.16.4 PRU_ICSSG Universal Asynchronous Receiver Transmitter (UART)
Table 7-97. PRU_ICSSG UART Timing Conditions
PARAMETER
MIN
MAX
UNIT
INPUT CONDITIONS
SRI
Input slew rate
0.01
0.33
V/ns
OUTPUT CONDITIONS
CL
Output load capacitance
1
30
pF
7.10.5.16.4.1 PRU_ICSSG UART Timing
Table 7-98. PRU_ICSSG UART Timing Requirements
see Figure 7-97
NO.
PARAMETER
DESCRIPTION
MIN
MAX
UNIT
PRUR1H
tw(RXH)
Pulse duration, receive start, stop, data bit high
U
(1)
ns
PRUR1L
tw(RXL)
Pulse duration, receive start, stop, data bit low
-2+U
(1)
ns
(1)
U = UART baud time in ns = 1/programmed baud rate.
Table 7-99. PRU_ICSSG UART Switching Characteristics
see Figure 7-97
NO.
PARAMETER
DESCRIPTION
MIN
MAX
UNIT
f(baud)
Programmed baud rate
12
Mbps
PRUR3H
tw(TXH)
Pulse duration, transmit start, stop, data bit high
U
(1)
ns
PRUR3L
tw(TXL)
Pulse duration, transmit start, stop, data bit low
-2+U
(1)
ns
(1)
U = UART baud time in ns = 1/programmed baud rate.
PRUR3L
Start
Bit
Data Bits
PRG _UART0_TXD
i
PRU_UART_TIMING_01
PRUR3H
PRUR1L
Data Bits
Bit
Start
PRG _UART0_RXD
i
PRUR1H
(1)
(1)
(1) i in PRG _UART0_RXD and PRG _UART0_TXD = 0, 1 or 2
i
i
Figure 7-97. PRU_ICSSG UART Timing Requirements and Switching Characteristics
www.ti.com
AM6442, AM6441, AM6421
AM6412, AM6411
SPRSP56 – JANUARY 2021
Copyright © 2021 Texas Instruments Incorporated
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197
Product Folder Links: AM6442 AM6441 AM6421 AM6412 AM6411



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