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LAN7430/Y9X Datasheet(PDF) 60 Page - Microchip Technology |
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LAN7430/Y9X Datasheet(HTML) 60 Page - Microchip Technology |
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60 / 77 page  LAN7430/LAN7431 DS00002631D-page 60 2018-2019 Microchip Technology Inc. Note 7-18 40ns for 100BASE-TX operation, 400ns for 10BASE-T operation. Note 7-19 Timing was designed for system load between 10 pf and 25 pf. FIGURE 7-7: MII RECEIVE TIMING TABLE 7-15: MII RECEIVE TIMING VALUES Symbol Description Min Max Units Notes tclkp RX_CLK period Note 7-18 ns tclkh RX_CLK high time tclkp*0.4 tclkp*0.6 ns tclkl RX_CLK low time tclkp*0.4 tclkp*0.6 ns tsu RXD[3:0], RX_DV, RX_ER setup time to rising edge of RX_CLK 8.0 ns Note 7-19 thold RXD[3:0], RX_DV, RX_ER hold time after rising edge of RX_CLK 9.0 ns Note 7-19 RX_CLK tsu RXD[3:0], RX_ER RX_DV tclkh tclkl tclkp thold tsu thold thold tsu thold |
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